8.7. AC Characteristics
8.7.1. Serial EEPROM Interface Timing
93C46(64*16)/93C56(128*16)
EESK
EECS
EEDI (Read)
1 1 0 An
(Read)
EEDO High Impedance
A2 A1 A0
0 Dn
RTL8111C
Datasheet
tcs
D1 D0
EESK
EECS
tcs
EEDI (Write)
1 0 1 An ... A0 Dn ... D0
(Write)
EEDO High Impedance
BUSY
twp
READY
tsk
EESK
tskh
tskl
tcsh
EECS
tcss
tdis
tdih
EEDI
tdos
tdoh
EEDO (Read)
tsv
EEDO (Program)
STATUS VALID
Figure 20. Serial EEPROM Interface Timing
Table 32. EEPROM Access Timing Parameters
Symbol Parameter
EEPROM Type
Min.
Max.
Unit
tcs
Minimum CS Low Time
9346
1000
-
ns
twp
Write Cycle Time
9346
-
10
ms
tsk
SK Clock Cycle Time
9346
4
-
µs
tskh
SK High Time
9346
1000
-
ns
tskl
SK Low Time
9346
1000
-
ns
tcss
CS Setup Time
9346
200
-
ns
tcsh
CS Hold Time
9346
0
-
ns
tdis
DI Setup Time
9346
400
-
ns
tdih
DI Hold Time
9346
400
-
ns
tdos
DO Setup Time
9346
2000
-
ns
tdoh
DO Hold Time
9346
-
2000
ns
tsv
CS to Status Valid
9346
-
1000
ns
Integrated Gigabit Ethernet Controller for PCI Express
33
Track ID: JATR-1076-21 Rev. 1.5