R5F10367DSP-U0 View Datasheet(PDF) - Renesas Electronics

Part Name

Description

MFG CO.

R5F10367DSP-U0

RENESAS MCU True Low Power Platform (as low as 63 μA/MHz), 1.8V to 5.5V operation, 2 to 16 Kbyte Flash, 31 DMIPS at 24MHz, for General Purpose Applications

Renesas Electronics 

RL78/G12

3. ELECTRICAL SPECIFICATIONS (G: TA = −40 to +105°C)

(5) Communication at different potential (1.8 V, 2.5 V, 3 V) (UART mode)

(TA = −40 to +105°C, 2.4 V ≤ VDD ≤ 5.5 V, VSS = 0 V)

Parameter Symbol

Conditions

Transfer

rate Note4

Reception

Transmission

4.0 V ≤ VDD ≤ 5.5 V,

2.7 V ≤ Vb ≤ 4.0 V

Theoretical value of the maximum

transfer rate

fMCK = fCLKNote 2

2.7 V ≤ VDD < 4.0 V,

2.3 V ≤ Vb ≤ 2.7 V

Theoretical value of the maximum

transfer rate

fMCK = fCLKNote 2

2.4 V ≤ VDD < 3.3 V,

1.6 V ≤ Vb ≤ 2.0 V

Theoretical value of the maximum

transfer rate

fMCK = fCLKNote 2

4.0 V ≤ VDD ≤ 5.5 V,

2.7 V ≤ Vb ≤ 4.0 V

Theoretical value of the maximum

transfer rate

Cb = 50 pF, Rb = 1.4 kΩ, Vb = 2.7 V

2.7 V ≤ VDD < 4.0 V,

2.3 V ≤ Vb ≤ 2.7 V,

Theoretical value of the maximum

transfer rate

Cb = 50 pF, Rb = 2.7 kΩ, Vb = 2.3 V

2.4 V ≤ VDD < 3.3 V,

1.6 V ≤ Vb ≤ 2.0 V

Theoretical value of the maximum

transfer rate

Cb = 50 pF, Rb = 5.5 kΩ, Vb = 1.6 V

HS (high-speed main)

Mode

MIN.

MAX.

fMCK/12

Note 1

2.0

fMCK/12

Note 1

2.0

fMCK/12

Note 1

2.0

Note 3

2.0

Note 4

Note 5

1.2

Note 6

Notes

2, 7

0.43

Note 8

Unit

bps

Mbps

bps

Mbps

bps

Mbps

bps

Mbps

bps

Mbps

bps

Mbps

Notes 1.

2.

3.

Transfer rate in the SNOOZE mode is 4800 bps only.

The maximum operating frequencies of the CPU/peripheral hardware clock (fCLK) are:

HS (high-speed main) mode: 24 MHz (2.7 V ≤ VDD ≤ 5.5 V)

16 MHz (2.4 V ≤ VDD ≤ 5.5 V)

The smaller maximum transfer rate derived by using fMCK/12 or the following expression is the valid

maximum transfer rate.

Expression for calculating the transfer rate when 4.0 V ≤ VDD ≤ 5.5 V and 2.7 V ≤ Vb ≤ 4.0 V

Maximum transfer rate =

1

{−Cb × Rb × ln (1 −

2.2

Vb

)} × 3

[bps]

Baud rate error (theoretical value) =

1

Transfer rate × 2

− {−Cb × Rb × ln (1 −

2.2

Vb

)}

(

1

Transfer

rate

)

×

Number

of

transferred

bits

× 100 [%]

* This value is the theoretical value of the relative difference between the transmission and reception sides.

R01DS0193EJ0200 Rev.2.00

Sep 06, 2013

Page 82 of 106

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