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R5F10366GNA-V0 View Datasheet(PDF) - Renesas Electronics

Part Name
Description
MFG CO.
R5F10366GNA-V0 Datasheet PDF : 110 Pages
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RL78/G12
2. ELECTRICAL SPECIFICATIONS (A, D: TA = 40 to +85°C)
<R> (6) Communication at different potential (1.8 V, 2.5 V, 3 V) (UART mode)
(TA = 40 to +85°C, 1.8 V VDD 5.5 V, VSS = 0 V)
Parameter Symbol
Conditions
Transfer
rate Note4
Reception
Transmission
4.0 V VDD 5.5 V,
2.7 V Vb 4.0 V
Theoretical value of the maximum
transfer rate
fMCK = fCLKNote3
2.7 V VDD < 4.0 V,
2.3 V Vb 2.7 V
Theoretical value of the maximum
transfer rate
fMCK = fCLKNote3
1.8 V VDD < 3.3 V,
1.6 V Vb 2.0 V
Theoretical value of the maximum
transfer rate
fMCK = fCLKNote3
4.0 V VDD 5.5 V,
2.7 V Vb 4.0 V
Theoretical value of the maximum
transfer rate
Cb = 50 pF, Rb = 1.4 kΩ, Vb = 2.7 V
2.7 V VDD < 4.0 V,
2.3 V Vb 2.7 V,
Theoretical value of the maximum
transfer rate
Cb = 50 pF, Rb = 2.7 kΩ, Vb = 2.3 V
1.8 V VDD < 3.3 V,
1.6 V Vb 2.0 V
Theoretical value of the maximum
transfer rate
Cb = 50 pF, Rb = 5.5 kΩ, Vb = 1.6 V
HS (high-speed
main) Mode
MIN. MAX.
fMCK/6
Note1
4.0
fMCK/6
Note1
4.0
fMCK/6
Notes1, 2
4.0
Note4
2.8
Note5
Note6
1.2
Note7
Notes
2, 8
0.43
Note9
LS (low-speed Unit
main) Mode
MIN. MAX.
fMCK/6
bps
Note1
1.3 Mbps
fMCK/6
Note1
1.3
bps
Mbps
fMCK/6
bps
Notes1, 2
1.3 Mbps
Note4 bps
2.8
Note5
Mbps
Note6 bps
1.2
Note7
Mbps
Notes
2, 8
0.43
Note9
bps
Mbps
<R> Notes 1. Transfer rate in the SNOOZE mode is 4800 bps only.
<R>
2. Use it with VDD Vb.
<R>
3. The maximum operating frequencies of the CPU/peripheral hardware clock (fCLK) are:
HS (high-speed main) mode: 24 MHz (2.7 V VDD 5.5 V)
16 MHz (2.4 V VDD 5.5 V)
LS (low-speed main) mode: 8 MHz (1.8 V VDD 5.5 V)
<R>
4. The smaller maximum transfer rate derived by using fMCK/6 or the following expression is the valid
maximum transfer rate.
Expression for calculating the transfer rate when 4.0 V VDD 5.5 V and 2.7 V Vb 4.0 V
Maximum transfer rate =
1
{Cb × Rb × ln (1
2.2
Vb
)} × 3
[bps]
Baud rate error (theoretical value) =
1
Transfer rate × 2
{Cb × Rb × ln (1
2.2
Vb
)}
(
1
Transfer
rate
)
×
Number
of
transferred
bits
× 100 [%]
* This value is the theoretical value of the relative difference between the transmission and reception sides.
R01DS0193EJ0200 Rev.2.00
Sep 06, 2013
Page 38 of 106

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