AR1000 SERIES RESISTIVE TOUCH SCREEN CONTROLLER
5.7 Timing – Bit Details
5.7.1 BIT RATE
The SPI standard does not specify a maximum data
rate for the serial bus. In general, SPI data rates can be
in MHz. Peripherals devices, such as the AR1021
controller, specify their own unique maximum SPI data
rates.
The maximum SPI bit rate for the AR1021 controller is
~900 kHz.
Characterization has been performed at bit rates of ~39
kHz and ~156 kHz.
FIGURE 5-4:
SPI BIT TIMING – DETAIL
5.7.2 INTER-BYTE DELAY
The AR1021 controller requires an inter-byte delay of
~50 us. This means the host should wait ~50 us
between the end of clocking a given byte and the start
of clocking the next byte.
5.7.3 BIT TIMING – DETAIL
Characterized timing details are shown below, in
Figure 5-4.
TABLE 5-3: SPI BIT TIMING MIN. AND MAX. VALUES
Parameter Number(1)
Parameter Description
Min.
10
SS↓ (select) to SCK↑ (initial)
500
11
SCK high
550
12
SCK low
550
13
SCK↓ (last) to SS↑ (deselect)
800
14
SDI setup before SCK↓
100
15
SDI hold after SCK↓
100
16
SDO valid after SCK↓
—
17
SDO↑ rise
—
18
SDO↓ fall
—
19
SS↑ (deselect) to SDO High-z
10
Note 1: Parameters are characterized, but not tested.
Max.
—
—
—
—
—
—
150
50
50
50
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
DS41393B-page 24
Preliminary
2009-2012 Microchip Technology Inc.