STM8S207MBT3TR View Datasheet(PDF) - STMicroelectronics

Part Name

Description

MFG CO.

STM8S207MBT3TR

Performance line, 24 MHz STM8S 8-bit MCU, up to 128 KB Flash, integrated EEPROM, 10-bit ADC, timers, 2 UARTs, SPI, I²C, CAN

STMicroelectronics 

Electrical characteristics

STM8S207xx, STM8S208xx

Figure 34. Typical NRST pull-up resistance vs VDD @ 4 temperatures

-40˚C

60

25˚C

85˚C

55

125˚C

50

45

40

35

30

2.5

3

3.5

4

4.5

5

5.5

6

VDD [V]

Figure 35. Typical NRST pull-up current vs VDD @ 4 temperatures

140

120

100

80

60

-40˚C

25˚C

40

85˚C

20

125˚C

0

0

1

2

3

4

5

6

VDD [V]

ai15069

The reset network shown in Figure 36 protects the device against parasitic resets. The user

must ensure that the level on the NRST pin can go below the VIL max. level specified in

Table 41. Otherwise the reset is not taken into account internally. For power consumption

sensitive applications, the capacity of the external reset capacitor can be reduced to limit

charge/discharge current. If the NRSTsignal is used to reset the external circuitry, care must

be taken of the charge/discharge time of the external capacitor to fulfill the external device’s

reset timing conditions. The minimum recommended capacity is 10 nF.

Figure 36. Recommended reset pin protection

VDD

STM8

External

reset

circuit

(optional)

0.1µF

NRST

RPU

Filter

Internal reset

76/103

Doc ID 14733 Rev 12

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