CS5505(2009) View Datasheet(PDF) - Cirrus Logic

Part Name

Description

MFG CO.

CS5505
(Rev.:2009)

Very Low Power, 16-Bit & 20-Bit A/D Converters

Cirrus Logic 

CDB5505/6/7/8

CS5505/6/7/8

Introduction

The CDB5505/6/7/8 evaluation board provides a off-board reference if the connections (2A and

quick means of testing the CS5505/6/7/8 series 2B) to the bandgap IC are cut.

A/D converters. The CS5505/6/7/8 converters

require a minimal amount of external circuitry.

le The evaluation board comes configured with the

A/D converter chip operating from a 32.768 kHz

crystal and with an off-chip precision 2.5 volt

b reference. The board provides access to all of

ila the digital interface pins of the CS5505/6/7/8

chip.

a The board is configured for operation from +5

v ly and -5 volt power supplies, but can be operated

from a single +5 volt supply if the -5V binding

A n post is shorted to the GND binding post.

r O Evaluation Board Overview

e e The board provides a complete means of making

g c the CS5505/6/7/8 A/D converter chip function.

n The user must provide a means of taking the

n output data from the board in serial format and

o e using it in his system.

L r Figure 1 illustrates the schematic for the board.

o fe The board comes configured for the A/D con-

verter chip to operate from the 32.768 kHz

e watch crystal. A BNC connector for an external

N clock is provided on the board. To connect the

R external BNC source to the converter chip, a cir-

cuit trace must be cut. Then a jumper must be

B r inserted in the proper holes to connect the XIN

D o pin of the converter to the input line from the

BNC. The BNC input is terminated with a 50Ω

C F resistor. Remove this resistor if driving from a

Note that the pin-out of the CS5505/6/7/8 series

chips allows the 20-pin single channel devices to

be plugged into the 24-pin, four channel foot-

print. See Figure 2 which illustrates the footprint

compatibility.

Prior to powering up the board, select the serial

port operating mode with the appropriate jumper

on the M/SLP header. The device can be oper-

ated in either the SSC (Synchronous

Self-Clocking) or the SEC (Synchronous Exter-

nal Clocking) mode. See the device data sheet

for an explanation of these modes.

All of the control pins of the CS5505/6/7/8 are

available at the J1 header connector. Buffer ICs

U2 and U3 are used to buffer the converter for

interface to off-board circuits. The buffers are

used on the evaluation board only because the

exact loading and off-board circuitry is un-

known. Most applications will not require the

buffer ICs for proper operation.

To put the board in operation, select either bipo-

lar or unipolar mode with DIP switch S2. Then

press the CAL pushbutton after the board is

powered up. This initiates calibration of the con-

verter which is required before measurements

can be taken.

To select an input channel on the four channel

devices, use DIP switch S2 to select the inputs

logic gate. See the schematic in Figure 1.

A1

A0

Channel addressed

0

0

AIN1

The board comes with the A/D converter

0

1

AIN2

VREF+ and VREF- pins hard-wired to the

1

0

AIN3

2.5 volt bandgap voltage reference IC on the

board. The VREF+ and VREF- pins can be con-

1

1

AIN4

nected to either the on chip reference or an

Table 1. Multiplexer Truth Table

3344

DS59DB42

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