
Memory and register map
STM8S105x4/6
Table 8. General hardware register map (continued)
Address
Block
Register label
Register name
Reset status
0x00 526A
TIM1_CCR3L
TIM1 capture/compare
register 3 low
0x00
0x00 526B
TIM1_CCR4H
TIM1 capture/compare
register 4 high
0x00
0x00 526C
TIM1
TIM1_CCR4L
TIM1 capture/compare
register 4 low
0x00
0x00 526D
TIM1_BKR
TIM1 break register
0x00
0x00 526E
TIM1_DTR
TIM1 dead-time register
0x00
0x00 526F
TIM1_OISR
TIM1 output idle state register 0x00
0x00 5270 to 0x00 52FF Reserved area (147 byte)
38/121
DocID14771 Rev 15