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ST7PLITE35F2U6TR View Datasheet(PDF) - STMicroelectronics

Part Name
Description
MFG CO.
ST7PLITE35F2U6TR Datasheet PDF : 173 Pages
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ST7LITE3xF2
POWER SAVING MODES (Cont’d)
Figure 26. ACTIVE-HALT Timing Overview
HALT ACTIVE 256 OR 4096 CPU
RUN
CYCLE DELAY 1)
RUN
HALT
INSTRUCTION
[Active Halt Enabled]
RESET
OR
INTERRUPT
FETCH
VECTOR
Figure 27. ACTIVE-HALT Mode Flow-chart
HALT INSTRUCTION
(Active Halt enabled)
(AWUCSR.AWUEN=0)
OSCILLATOR ON
PERIPHERALS 2) OFF
CPU
OFF
I BIT
0
N
RESET
N
Y
INTERRUPT 3)
Y
OSCILLATOR ON
PERIPHERALS 2) OFF
CPU
ON
I BIT
X 4)
9.6 AUTO WAKE UP FROM HALT MODE
Auto Wake Up From Halt (AWUFH) mode is simi-
lar to Halt mode with the additional of an internal
RC oscillator for wake-up. Compared to ACTIVE-
HALT mode, AWUFH has lower power consump-
tion (the main clock is not kept running), but there
is no accurate realtime clock available.
It is entered by executing the HALT instruction
when the AWUEN bit in the AWUCSR register has
been set.
Figure 28. AWUFH Mode Block Diagram
AWUCK Opt bit
AWU RC
Oscillator 1
32-KHz
0
Oscillator
to
Auto-Reload Timer
Input Capture
fAWU_RC
/64
divider
AWUFH
AWUFH
interrupt
prescaler/1 .. 255 (ei0 source)
256 OR 4096 CPU
CLOCK CYCLE DELAY
OSCILLATOR ON
PERIPHERALS ON
CPU
ON
I BIT
X 4)
FETCH RESET VECTOR
OR SERVICE INTERRUPT
Notes:
1. This delay occurs only if the MCU exits ACTIVE-
HALT mode by means of a RESET.
2. Peripherals clocked with an external clock
source can still be active.
3. Only the RTC1 interrupt and some specific inter-
rupts can exit the MCU from ACTIVE-HALT mode.
Refer to Table 6, “Interrupt Mapping,” on page 36
for more details.
4. Before servicing an interrupt, the CC register is
pushed on the stack. The I bit of the CC register is
set during the interrupt routine and cleared when
the CC register is popped.
As soon as HALT mode is entered, and if the
AWUEN bit has been set in the AWUCSR register,
the AWU RC oscillator provides a clock signal
(fAWU_RC). Its frequency is divided by a fixed divid-
er and a programmable prescaler controlled by the
AWUPR register. The output of this prescaler pro-
vides the delay time. When the delay has elapsed
the AWUF flag is set by hardware and an interrupt
wakes-up the MCU from Halt mode. At the same
time the main oscillator is immediately turned on
and a 256 cycle delay is used to stabilize it. After
this start-up delay, the CPU resumes operation by
servicing the AWUFH interrupt. The AWU flag and
its associated interrupt are cleared by software
reading the AWUCSR register.
To compensate for any frequency dispersion of
the AWU RC oscillator, it can be calibrated by
measuring the clock frequency fAWU_RC and then
calculating the right prescaler value. Measurement
mode is enabled by setting the AWUM bit in the
AWUCSR register in Run mode. This connects
fAWU_RC to the input capture of the 12-bit Auto-Re-
lad timer, allowing the fAWU_RC to be measured
using the main oscillator clock as a reference time-
base.
43/173
1

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