CS5490-ISZ View Datasheet(PDF) - Cirrus Logic

Part Name

Description

MFG CO.

CS5490-ISZ

Two Channel Energy Measurement IC

Cirrus Logic 

CS5490

6.6.4 Phase Compensation (PC) – Page 0, Address 5

23

-

15

-

7

FPCC[7]

22

-

14

-

6

FPCC[6]

21

CPCC[1]

13

-

5

FPCC[5]

20

CPCC[0]

12

-

4

FPCC[4]

19

-

11

-

3

FPCC[3]

18

-

10

-

2

FPCC[2]

17

-

9

-

1

FPCC[1]

Default = 0x00 0000

[23:22]

CPCC[1:0]

[19:9]

FPCC[8:0]

Reserved.

Coarse phase compensation control for I & V.

00 = No extra delay

01 = 1 OWR delay in current channel

10 = 1 OWR delay in voltage channel

11 = 2 OWR delay in voltage channel

Reserved.

Fine phase compensation control for I & V.

Sets a delay in current, relative to voltage.

Resolution: 0.008789° at 50Hz and 0.010547° at 60Hz (OWR = 4000)

16

-

8

FPCC[8]

0

FPCC[0]

6.6.5 UART Control (SerialCtrl) – Page 0, Address 7

23

-

15

BR[15]

7

BR[7]

22

-

14

BR[14]

6

BR[6]

21

-

13

BR[13]

5

BR[5]

20

-

12

BR[12]

4

BR[4]

19

-

11

BR[11]

3

BR[3]

18

17

RX_PU_OFF RX_CSUM_OFF

10

BR[10]

9

BR[9]

2

BR[2]

1

BR[1]

Default = 0x02 004D

[23:19]

Reserved.

RX_PU_OFF

Disable the pull-up resistor on the RX input pin.

0 = Pull-up resistor enabled (Default)

1 = Pull-up resistor disabled

RX_CSUM_OFF Disable the checksum on serial port data.

0 = Enable checksum

1 = Disable checksum (Default)

[16]

Reserved.

BR[15:0]

Baud rate (serial bit rate).

BR[15:0] = Baud Rate x 524288 / MCLK

16

-

8

BR[8]

0

BR[0]

34

DS982F2

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