1-Gbit P30 Family
Table 8.
Discrete Bottom Parameter Memory Maps (all packages)
Programming Size
Region (KB)
Blk
256-Mbit
Blk
128-Mbit
128 18 0F0000 - 0FFFFF 10 070000 - 07FFFF
Programming Size
Region (KB)
Blk
128 4 010000 - 01FFFF 4 010000 - 01FFFF
0
32 3 00C000 - 00FFFF 3 00C000 - 00FFFF
32 0 000000 - 03FFFF 0 000000 - 00FFFF
64-Mbit
Table 9.
512-Mbit Memory Map (Easy BGA and QUAD+ SCSP)
Flash Die # Die Stack Config. Size (KB)
512-Mbit Flash (2x256-Mbit w/ 1CE)
Blk
Address Range
32
258
FFC000 - FFFFFF
2
Flash Die #2
32
255
(Top Parameter)
128
254
FF0000 - FF3FFF
FE0000 - FEFFFF
128
0
000000 - 00FFFF
128
258
FF0000 - FFFFFF
1
Flash Die #1 (Bottom
128
Parameter)
32
4
3
010000 - 01FFFF
00C000 - 00FFFF
32
0
000000 - 003FFF
Note: Refer to 256-Mbit Memory Map (Table 7 and Table 8) for Programming Region Information.
Datasheet
Intel StrataFlash® Embedded Memory (P30)
Order Number: 306666, Revision: 001
April 2005
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