M25P10-AMN6TP View Datasheet(PDF) - STMicroelectronics

Part Name

Description

MFG CO.

M25P10-AMN6TP

1 Mbit, low voltage, Serial Flash memory with 50MHz SPI bus interface

STMicroelectronics 

Revision history

M25P10-A

Table 24. Document revision history

Date

Revision

Changes

14-Apr-2006

05-Jun-2006

All packages are ECOPACK® compliant. Grade 3 information added (see

Table 10, Table 11, Table 15, Table 17, Table 18 and Table 23).

Figure 3: Bus Master and memory devices on the SPI Bus modified and

Note 2 added.

Table 11: Data retention and endurance added.

40MHz frequency condition modified for ICC3 in Table 14: DC

6

Characteristics (Device Grade 6).

Table 14: DC Characteristics (Device Grade 6) shows preliminary data.

MLP package renamed as VFQFPN and specifications updated (see

silhouette on page 1, Figure 27 and Table 22). Note 2 added below

Figure 26 and Note 2 added below Figure 27. VWI parameter for Device

Grade 3 added to Table 8: Power-Up Timing and VWI Threshold.

/X Process added to Table 23: Ordering information scheme.

tRES1 and tRES2 parameter timings changed for devices produced with the

“X” process technology in Table 18 and Table 19.

7

SO8 Narrow package specifications updated (see Figure 26 and

Table 21).

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