CL-PS7110 View Datasheet(PDF) - Cirrus Logic
Part Name
Description
MFG CO.
CL-PS7110 Datasheet PDF : 82 Pages
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CL-PS7110
Low-Power System-on-a-Chip
Table 2-2. Numeric Pin Listinga (cont.)
Pin
No.
Signal
Bufferb
Reset
and Pin
Test
Rest
State
164
A[6]
I/O - strength 1
Low
165
D[6]
I/O - strength 1
Low
166
A[5]
I/O - strength 1
Low
167
D[5]
I/O - strength 1
Low
168
VDD
I/O - strength 1
Low
169
VSS
Pad power
–
170
A[4]
I/O - strength 1
Low
171
D[4]
I/O - strength 1
Low
172
A[3]
I/O - strength 1
Low
173
D[3]
I/O - strength 1
Low
174
A[2]
I/O - strength 1
Low
175
D[2]
I/O - strength 1
Low
176
A[1]
I/O - strength 1
Low
177
D[1]
I/O - strength 1
Low
178
A[0]
I/O - strength 1
Low
179
D[0]
I/O - strength 1
Low
180
VSS
Core power
–
181
VDD
Core power
–
182
VSS
Pad power
–
183
VDD
Pad power
–
184
CL2
I/O - strength 1
Low
185
CL1
I/O - strength 1
Low
186
FRM
I/O - strength 1
Low
187
M
I/O - strength 1
Low
188
DD[3] a
I/O - strength 1
Low
189
DD[2] a
I/O - strength 1
Low
190
DD[1] a
I/O - strength 1
Low
191
DD[0] a
I/O - strength 1
Low
38
PIN INFORMATION
Table 2-2. Numeric Pin Listinga (cont.)
Pin
No.
Signal
Bufferb
Reset
and Pin
Test
Rest
State
192
NRAS[3]
I/O - strength 1
High
193
NRAS[2]
I/O - strength 1
High
194
NRAS[1]
I/O - strength 1
High
195
NRAS[0]
I/O - strength 1
High
196
NCAS[3]
I/O - strength 1
High
197
NCAS[2]
I/O - strength 1
High
198
VDD
Pad power
–
199
VSS
Pad power
–
200
NCAS[1]
I/O - strength 1
High
201
NCAS[0]
I/O - strength 1
High
202
NMWE
I/O - strength 1
High
203
NMOE
I/O - strength 1
High
204
NCS[0]
I/O - strength 1
High
205
NCS[1]
I/O - strength 1
High
206
NCS[2]
I/O - strength 1
High
207
NCS[3]
I/O - strength 1
High
208
CS[4]
I/O - strength 1
Low
a DD0–DD3 must be pulled-up or -down using a 100-kΩ
resistor.
b See Table 4-3 on page 70.
May 1997
DATA BOOK v1.5
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