CS89712-CB View Datasheet(PDF) - Cirrus Logic

Part Name

Description

MFG CO.

CS89712-CB

High-Performance, Low-Power System-on-Chip with 10BASE-T Ethernet Controller

Cirrus Logic 

CS89712

is LEDDRV, and the input from the photodiode is

PHDIN. Modem status lines will cause an interrupt

(which can be masked) irrespective of whether the

SIR interface is being used.

Both the UARTs operate in a similar manner to the

industry standard 16C550A. When CTS is deas-

serted on the UART, the UART does not stop shift-

ing the data. It relies on software to make an

appropriate response to the interrupt generated.

Baud rates supported for both the UARTs are de-

pendent on frequency of operation. When operat-

ing from the internal PLL, the interface supports

various baud rates from 115.2 kbits/s downwards.

The master clock frequency is chosen so that most

of the required data rates are obtainable exactly.

2.17 Synchronous Serial Interfaces

The CS89712 has the synchronous serial interfaces

shown in Table 21. Three sets of serial interface

(DAI, CODEC, and SSI2) pins are multiplexed to-

gether. On power up, both the DAISEL and SER-

SEL register bits are low, enabling the master /

slave SSI2 to these pins (and configuring it for

slave mode operation to avoid external contention).

Table 22 contains pin definition information for the

three multiplexed interfaces.

The internal names given to each of the three inter-

faces are unique to help differentiate them from

each other. The sections below that describe each

of the three interfaces will use their respective

unique internal pin names for clarity.

Type

SPI / Microwire 1

SPI / Microwire 2

DAI Interface

CODEC Interface

Comments

Master mode only

Master / slave mode

CD quality DACs and ADCs

Referred To As

ADC Interface

SSI2 Interface

DAI Interface

CODEC

Interface

Table 21. Serial Interface Options

Max. Transfer Speed

128 kbits/s

512 kbits/s

1.536 Mbits/s

64 kbits/s

BGA

Ball

External

Pin Name

SSICLK

SSITXFR

SSITXDA

SSIRXDA

SSIRXFR

SSI2

Slave Mode

(Internal Name)

SSICLK = serial bit

clock; Input

SSITXFR = TX

frame sync; Input

SSITXDA = TX

data; Output

SSIRXDA = RX

data; Input

SSIRXFR = RX

frame sync; Input

SSI2

Master Mode

Output

Output

Output

Input

Output

CODEC

Internal Name

PCMCLK =

Output

PCMSYNC = Output

PCMOUT = Output

PCMIN = Input

p/u

(use a 10k pull-up)

DAI

Internal Name

SCLK =

Output

LRCK = Output

SDOUT = Output

SDIN = Input

MCLK

Strength

1

1

1

1

Table 22. Serial-Pin Assignments

DS502PP2

31

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