
LS1240A
BLOCK DIAGRAM
LINEAR INTEGRATED CIRCUIT
TELEPHONE 1
LINE
2
GND
RECTIFIER
IN BRIDGE IN
8
TELEPHONE
LINE
7
RECTIFIER
CAPACITOR
SWEEP RATE
3
CONTROL CAPACITOR
SWITCHING
FREQUENCY
GENERATOR
THRESHOLD
CIRCUIT
WITH
HYSTERESIS
6 N.C.
4
OUTPUT FREQYENCY
CONTROL RESISTOR
NONE
FREQUENCY
GENERATOR
OUTPUT
STAGE
5
BUZZER
TEST CIRCUIT
1F
2.2k
8
5
VAB
7 UTC LS1240A RL Vout
10 F
1
23
4
R1
C1 14k
100nF
27200
f1
R1=
*(1-0.04 In
f1(Hz)
1943
)
f2=0.725f1
fSWEEP =
750
C1(nF)
UNISONIC TECHNOLOGIES CO., LTD
www.unisonic.com.tw
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QW-R108-002.I