CS61884-IB View Datasheet(PDF) - Cirrus Logic
Part Name
Description
MFG CO.
CS61884-IB Datasheet PDF : 71 Pages
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CS61884
19.5 Receiver Analog Characteristics
(TA = -40°C to 85°C; TV+, RV+ = 3.3 V ±5%; GND = 0 V))
Parameter
Min.
Typ
Max Units
Allowable Cable Attenuation @ 1024kHz and 772kHz
-
RTIP/RRING Input Impedance
(Internal Line matching mode)
Note 11
T1/J1 100 Ω Load -
E1 120Ω Load -
E1 75Ω Load -
RTIP/RRING Input Impedance
(External Line matching mode)
Note 11
T1/J1 100 Ω Load -
E1 120Ω Load -
E1 75Ω Load -
-
- 12
dB
140
-
Ω
14k
-
50
-
14K
-
Ω
14k
-
14K
-
Receiver Dynamic Range
0.5
-
-
Vp
Signal to Noise margin (Per G.703, O151 @ 6dB cable Atten). Note 11 -
- 18
-
dB
Receiver Squelch Level
-
150
-
mV
LOS Threshold
-
200
-
mV
LOS Hysteresis
-
50
-
mV
Data Decision Threshold
Note 11
E1 Modes 41
50
59
% of
peak
Data Decision Threshold
Note 11
T1/J1 Modes 56
65
74
% of
peak
Input Jitter Tolerance - E1
Notes 11, 15, 17
1 Hz - 1.8 Hz 18
-
20 Hz - 2.4 kHz 1.5
-
18 kHz - 100 kHz 0.2
-
-
UI
-
-
Input Jitter Tolerance - T1/J1
Notes 11, 15, 17
0.1 Hz - 1 Hz 138
-
4.9 Hz - 300 kHz 28
-
10kHz - 100 kHz 0.4
-
-
UI
-
-
Input Return Loss - E1/T1/J1
Notes 11, 12, 13
51 kHz - 102 kHz - 18
- 28
-
dB
102 kHz - 2048 kHz - 18
- 30
-
2048 kHz - 3072 kHz - 18
- 27
-
Notes: 11. Parameters guaranteed by design and characterization.
12. Using components on the CDB61884 evaluation board in Internal Match Impedance Mode.
13. Return loss = 20log10 ABS((Z1 + Z0) / (Z1 - Z0)) where Z1 - impedance of the transmitter or receiver,
and Z0 = cable impedance.
14. Assuming that jitter free clock is input to TCLK.
15. Jitter tolerance for 0 dB for T1/J1 input signal levels and 6 dB for E1 input signal levels. Jitter tolerance
increases at lower frequencies. HDB3/B8ZS coders enabled.
16. In Data Recovery Mode.
17. Jitter Attenuator in the receive path.
56
DS485F1
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