CS5460A-BS View Datasheet(PDF) - Cirrus Logic
Part Name
Description
MFG CO.
CS5460A-BS Datasheet PDF : 54 Pages
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CS5460A
6. PIN DESCRIPTIONS
Crystal Out
XOUT 1
CPU Clock Output CPUCLK 2
Positive Digital Supply
VD+ 3
Digital Ground
DGND 4
Serial Clock Input
SCLK 5
Serial Data Output
SDO 6
Chip Select
CS 7
Mode Select
MODE 8
Differential Voltage Input
VIN+ 9
Differential Voltage Input
VIN- 10
Voltage Reference Output VREFOUT 11
Voltage Reference Input VREFIN 12
24 XIN
Crystal In
23 SDI
Serial Data Input
22 EDIR
Energy Direction Indicator
21 EOUT
Energy Output
20 INT
Interrupt
19 RESET Reset
18 NC
No Connect
17 PFMON Power Fail Monitor
16 IIN+
Differential Current Input
15 IIN-
Differential Current Input
14 VA+
Positive Analog Supply
13 VA-
Analog Ground
Clock Generator
Crystal Out
Crystal In
1,24 XOUT, XIN - A gate inside the chip is connected to these pins and can be used with a
crystal to provide the system clock for the device. Alternatively, an external (CMOS
compatible clock) can be supplied into XIN pin to provide the system clock for the device.
CPU Clock Output
2 CPUCLK - Output of on-chip oscillator which can drive one standard CMOS load.
Control Pins and Serial Data I/O
Serial Clock Input
5 SCLK - A clock signal on this pin determines the input and output rate of the data for the
SDI and SDO pins respectively. This input is a Schmitt trigger to allow for slow rise time
signals. The SCLK pin will recognize clocks only when CS is low.
Serial Data Output
6 SDO - SDO is the output pin of the serial data port. Its output will be in a high impedance
state when CS is high.
Chip Select
7 CS - When low, the port will recognize SCLK. An active high on this pin forces the SDO
pin to a high impedance state. CS should be changed when SCLK is low.
Mode Select
8 MODE - When at logic high, the CS5460A can perform the auto-boot sequence with the
aid of an external serial EEPROM to receive commands and settings. When at logic low,
the CS5460A assumes normal “host mode” operation. This pin is pulled down to logic
low if left unconnected, by an internal pull-down resistor to DGND.
Interrupt
20 INT - When INT goes low it signals that an enabled event has occurred. INT is cleared
(logic 1) by writing the appropriate command to the CS5460A.
Energy Output
21 EOUT - The energy output pin output a fixed-width pulse rate output with a rate (pro-
grammable) proportional to real (billable) energy.
Energy Direction
Indicator
22
EDIR - The energy direction indicator indicates if the measured energy is negative.
Serial Data Input
23 SDI - the input pin of the serial data port. Data will be input at a rate determined by SCLK.
Measurement and Reference Input
Differential
Voltage Inputs
9,10 VIN+, VIN- - Differential analog input pins for voltage channel.
DS487F4
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