CS44L10 View Datasheet(PDF) - Cirrus Logic

Part Name

Description

MFG CO.

CS44L10

Digital PWM Headphone Monitor

Cirrus Logic 

CS44L10

4.1.3 FLOAT OUTPUT (FLT)

Default = 0

0 - Disabled

1 - Enabled

Function:

When enabled, this bit will cause the headphone output of the CS44L10 to float when in the power down

state (PDN=1). The float function can be used in single-ended applications to maintain the charge on the

DC-blocking capacitor during power transients. On power transitions, the output will quickly change to the

bias point, however, if the DC-blocking capacitor still has a full charge, as in short power cycles, the tran-

sition will be very small, often inaudible. Refer to Section 6.4.

4.1.4 RAMP UP BYPASS (RUPBYP)

Default = 0

0 - Normal

1 - Bypass

Function:

When in normal mode, the duty cycle of the output PWM signal is increased at a rate determined by the

Ramp Speed variable (RMP_SPx). Normal mode is used in Single Ended applications to reduce pops in

the output caused by the DC-blocking capacitor. When the ramp up function is bypassed in Single Ended

applications, there will be an abrupt change in the output signal. Refer to Section 6.4.

4.1.5 RAMP DOWN BYPASS (RDNBYP)

Default = 0

0 - Disabled

1 - Enabled

Function:

When in normal mode, the duty cycle of the output PWM signal is decreased at a rate determined by the

Ramp Speed variable (RMP_SPx). Normal mode is used in Single Ended applications to reduce pops in

the output caused by the DC-blocking capacitor and changes in bias conditions. When the ramp down

function is bypassed in Single Ended applications, there will be an abrupt change in the output signal. Re-

fer to Section 6.4.

4.2 Channel A Volume Control (address 03h) (VOLA)

4.3 Channel B Volume Control (address 04h) (VOLB)

7

VOLx7

0

6

VOLx6

0

5

VOLx5

0

4

VOLx4

0

3

VOLx3

0

2

VOLx2

0

1

VOLx1

0

0

VOLx0

0

Default = 0 dB (No attenuation)

Function:

The Volume Control registers allow independent control of the signal levels in 1 dB increments from +18

to -96 dB. Volume settings are decoded using a 2’s complement code, as shown in Table 2. The volume

changes are implemented as dictated by the Soft and Zero Cross bits. All volume settings less than -96 dB

are equivalent to muting the channel via the ATAPI bits (see Section 4.8.2).

14

DS541PP1

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