STFLSTUDIO2/KIT View Datasheet(PDF) - STMicroelectronics
Part Name
Description
MFG CO.
STFLSTUDIO2/KIT Datasheet PDF : 28 Pages
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W.A.R.P.2.0
MEMORY
There are three memories in W.A.R.P.2.0, the
Antecedent Memory (AM), The Program/Conse-
quent Memory (PCM) and the Register Bench
(RB).
The AM is divided in 4 spaces, each having a
maximum of 64 bytes. It is also possible to divide
the AM in 8 parts, each having a maximum of 32
bytes.
It is possible to configure the AM in the following
modes (see fig. 12):
a) up to 4 inputs, each with 16 Antecedent MFs
(MAX);
b) up to 8 inputs, each with 8 Antecedent MFs
(MAX);
Each word (4 byte) of the AM contains the data of
a single MF related to an input. If W.A.R.P.2.0 has
been configured to accept up to 4 inputs it is
possible to have up to 16 MFs for each input. If
W.A.R.P.2.0 has been configured to accept up to 8
inputs it is possible to have up to 8 MFs for each
input. Each MF of the AM contains 3 (or 2) bit
indicating to which input variable the MF is corre-
lated.
The PCM is composed by 256 words (see fig. 13).
Each row (word) is related to a single rule and
contains 36 bit of microcode and 8 bit indicating the
consequent MF (crisp) related to this rule.
The RB contains data for the configuration of the
processor that can be set by software.
It is possible to fix:
the number of inputs, the number of outputs, the
address of the last word to load from the external
memory, the number of MF per input, the width of
the start A/D conversion pulse, the handshaking
signals polarity and the functioning mode of the
processor (Master/Slave).
Figure 12. Antecedent Memory Spaces.
64
Memb er ship
Fu n ct io n s
related to
INPUT 4
48
Memb er ship
Fu n ct io n s
related to
INPUT 3
32
Memb er ship
Fu n ct io n s
related to
INPUT 2
16
16
Memb er ship
Fu n ct io n s
related to
INPUT 1
0
0
64 MFs relate d
to INPUT8
MFs relate d
to INPUT7
MFs relate d
to INPUT6
MFs relate d
to INPUT5
MFs relate d
to INPUT4
MFs relate d
to INPUT3
MFs relate d
to INPUT2
8 MFs relate d
8
to INPUT1
0
0
Figure 13. Program/Consequent Memory and Register Bench.
25 6 Microco de Cons e que nt MFs
rela te d to RULE 256
12/28
2
Microco de Cons e que nt MFs
1
rela te d to RULE 2
Microco de Cons e que nt MFs
0
rela te d to RULE 1
4
Hands haking signal s polarity
3
Numb e r of Inputs -1
Num be r of Outputs - 1
2
Antece dent Me mory Configuration
A/D Sta rt Conve r sion Pulse width
1
On-Line phase Ma ste r/Slav e
Numbe r of Words to lo ad from the ex ternal
0
Me mory
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