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STM32F030C8P6TR(2013) View Datasheet(PDF) - STMicroelectronics

Part Name
Description
MFG CO.
STM32F030C8P6TR Datasheet PDF : 88 Pages
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Electrical characteristics
STM32F030x4 STM32F030x6 STM32F030x8
4095
4094
4093
7
6
5
4
3
2
1
Figure 20. ADC accuracy characteristics
1 LSBIDEAL

VDDA
4096
EG
(1) Example of an actual transfer curve
(2) The ideal transfer curve
(3) End point correlation line
(2)
ET
(3)
(1)
ET=Total Unadjusted Error: maximum deviation
between the actual and the ideal transfer curves.
EO=Offset Error: deviation between the first actual
transition and the first ideal one.
EO
EL
EG=Gain Error: deviation between the last ideal
transition and the last actual one.
ED=Differential Linearity Error: maximum deviation
between actual steps and the ideal one.
ED
EL=Integral Linearity Error: maximum deviation
between any actual transition and the end point
correlation line.
1 LSBIDEAL
0
1 2345 67
VSSA
4093 4094 4095 4096
VDDA
MS19880V1
Figure 21. Typical connection diagram using the ADC
RAIN(1)
AINx
VAIN
Cparasitic
VDDA
VT
0.6 V
VT
0.6 V
IL±1 μA
Sample and hold ADC
converter
RADC
12-bit
converter
CADC
MS19881V2
1. Refer to Table 48: ADC characteristics for the values of RAIN, RADC and CADC.
2. Cparasitic represents the capacitance of the PCB (dependent on soldering and PCB layout quality) plus the
pad capacitance (roughly 7 pF). A high Cparasitic value will downgrade conversion accuracy. To remedy
this, fADC should be reduced.
General PCB design guidelines
Power supply decoupling should be performed as shown in Figure 10: Power supply
scheme. The 10 nF capacitor should be ceramic (good quality) and it should be placed as
close as possible to the chip.
66/88
DocID024849 Rev 1

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