
ST7MC1xx/ST7MC2xx
INTERRUPTS (Cont’d)
Figure 24. External Interrupt Control bits
PORT D [6:4] INTERRUPTS
PDOR.6
PDDDR.6
PD6
IPA BIT
EICR
IS30 IS31
SENSITIVITY
PD6
CONTROL
PD5
PD4
PORT D [3:1] INTERRUPTS
PDOR.3
PDDDR.3
PD3
EICR
IS30 IS31
SENSITIVITY
PD3
CONTROL
PD2
PD1
PORT A3, PORT A[7:5] INTERRUPTS
EICR
PAOR.7
PADDR.7
PA7
IS20 IS21
SENSITIVITY
PA7
CONTROL
PA6
PA5
PA3
PORT C [3:1] INTERRUPTS
PCOR.3
PCDDR.3
PC3
IPB BIT
EICR
IS10 IS11
SENSITIVITY
PC3
CONTROL
PC2
PC1
PORT C0, PORT B[7:6] INTERRUPTS
EICR
PCOR.0
PCDDR.0
PC0
IS10 IS11
SENSITIVITY
PC0
CONTROL
PB7
PB6
ei0 INTERRUPT SOURCE
ei0 INTERRUPT SOURCE
ei1 INTERRUPT SOURCE
ei2 INTERRUPT SOURCE
ei2 INTERRUPT SOURCE
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