ST7FMC2S5TC(2004) View Datasheet(PDF) - STMicroelectronics

Part Name

Description

MFG CO.

ST7FMC2S5TC
(Rev.:2004)

8-BIT MCU WITH NESTED INTERRUPTS, FLASH, 10-BIT ADC, BRUSHLESS MOTOR CONTROL, FIVE TIMERS, SPI, LINSCI™

STMicroelectronics 

ST7MC1/ST7MC2

MOTOR CONTROLLER (Cont’d)

9.6.9.4 Programmable Chopper

Depending on the application hardware, a chopper

may be needed for the PWM signal. The MREF

register allows the chopping frequency and mode

to be programmed.

The HFE[1:0] bits program the channels on which

chopping is to be applied. The chopped PWM sig-

nal may be needed for high side switches only, low

side switches or both of them in the same time

(see Table 54).

Table 54. Chopping mode

HFE[1:0] bits

Chopping mode

HFE1 HFE0 PCN bit =0

PCN bit =1

0

0

OFF

OFF

Low side switches

0

1 Low channels only

MCO1, 3, 5

High side switches

1

0 High channels only

MCO0, 2, 4

1

1

Both Low and High Both high and low

channels

sides

The chopping frequency can any of the 8 values

from 100KHz to 2MHz selected by the HFRQ[2:0]

bits in the MREF register (see Table 55).

Table 55. Chopping frequency

Chopping

frequency

HFRQ2 HFRQ1 HFRQ0

Fmtc = 16MHz

Fmtc = 8MHz

0

0

0

100 KHz

Chopping

frequency

Fmtc = 4MHz

50 KHz

0

0

1

200 KHz

100 KHz

0

1

0

400 KHz

200 KHz

0

1

1

500 KHz

250 KHz

1

0

0

800 KHz

400 KHz

1

0

1

1 MHz

500 KHz

1

1

0

1.33 MHz 666.66 MHz

1

1

1

2 MHz

1 MHz

Note: When the PCN bit = 0:

– If complementary PWM signals are not applied

(DTE bit = 0), the high and low drivers are fixed

by the MPAR register. Figure 106, Figure 112

and Figure 113 indicate where the HFE[1:0] bits

are taken into account depending on the PWM

application.

– If complementary PWM signals are applied (DTE

bit = 1), the channels are paired as explained in

“Dead Time Generator” on page 190. This

means that the high and low channels are fixed

and the HFE[1:0] bits indicate where to apply the

chopper. Figure 114 shows typical complemen-

tary PWM signals with high frequency chopping

enabled on both high and low drivers.

Figure 114. Complementary PWM signals with chopping frequency on high and low side drivers.

Reference

5V

Input signal

0V

Output A

5V

Output B

Delay

Delay

0V

5V

0V

195/294

1

Share Link: