ST7MC1/ST7MC2
MOTOR CONTROLLER (Cont’d)
Table 23. MTC Registers
Register
Description
Register
page
(RPGS
Page
bit)
MTIM Timer Counter Register
0
203
MTIML
Timer LSB (mode depend-
ent)
0
203
MZPRV
MZREG
MCOMP
MDREG
Capture Zn-1 Register
Capture Zn Register
Compare Cn+1 Register
Demagnetization Reg.
0
203
0
203
0
203
0
203
MWGHT An Weight Register
MPRSR Prescaler & Sampling Reg.
0
204
0
204
MIMR Interrupt Mask Register
0
204
MISR Interrupt Status Register
0
205
MCRA Control Register A
0
206
MCRB Control Register B
0
208
MCRC Control Register C
0
209
MPHST Phase State Register
0
210
MDFR D Event Filter Register
0
212
MCFR
Current Feedback Filter
Register
0
211
MREF Reference register
0
213
MPCR PWM Control Register
0
214
MREP Repetition Counter Reg.
0
215
MCPWH Compare W Register High
0
215
MCPWL Compare W Register Low
0
215
MCPVH Compare V Register High
0
215
MCPVL Compare V Register Low
0
215
MCPUH Compare U Register High
0
216
MCPUL Compare U Register Low
0
216
MCP0H Compare 0 Register High
0
216
MCP0L Compare 0 Register Low
0
216
MDTG Dead Time Generator reg.
1
217
MPOL Polarity Register
1
218
MPWME PWM register
1
219
MCONF Configuration register
1
220
MPAR Parity register
1
221
MZFR Z Event Filter Register
1
222
MSCR Sampling Clock Register
1
223
9.6.2 Main Features
s Two on-chip analog comparators, one for BEMF
zero-crossing detection, the other for current
regulation or limitation
s Seven selectable reference voltages for the
hysteresis comparator (0.2 V, 0.6 V, 1 V, 1.5 V,
2 V, 2.5 V, 3.5 V) and the possibility to select an
external reference pin (MCVREF).
s 8-bit timer (MTIM) with three compare registers
and two capture features, which may be used as
the Delay manager of a speed measurement
unit
s Measurement window generator for BEMF
zero-crossing detection
s Filter option for the zero-crossing detection.
s Auto-calibrated prescaler with 16 division steps
s 8x8-bit multiplier
s Phase input multiplexer
s Sophisticated output management:
– The six output channels can be split into two
groups (high & low)
– The PWM signal can be multiplexed on high,
low or both groups, alternatively or simultane-
ously, for six-step motor drives
– 12-bit PWM generator with full modulation ca-
pability (0 and 100% duty cycle), edge or cent-
er-aligned patterns
– Dedicated interrupt for PWM duty cycles up-
dating and associated PWM repetition coun-
ter.
– Programmable deadtime insertion unit.
– Programmable High frequency Chopper in-
sertion and high current PWM outputs for di-
rect optocoupler drives.
– The output polarity is programmable channel
by channel.
– A programmable bit (active low) forces the
outputs in HiZ, Low or High state, depending
on option byte 1 (refer to “ST7FMC Device
Configuration And Ordering Information” sec-
tion).
– An “emergency stop” input pin (active low)
asynchronously forces the outputs in HiZ, Low
or High state, depending on option byte 1 (re-
fer to “ST7FMC Device Configuration And Or-
dering Information” section).
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