datasheetbank_Logo
Integrated circuits, Transistor, Semiconductors Search and Datasheet PDF Download Site

ST7FMC2N6B6(2004) View Datasheet(PDF) - STMicroelectronics

Part Name
Description
MFG CO.
ST7FMC2N6B6 Datasheet PDF : 294 Pages
First Prev 101 102 103 104 105 106 107 108 109 110 Next Last
ST7MC1/ST7MC2
LINSCISERIAL COMMUNICATION INTERFACE (SCI Mode) (Contd)
9.5.5 SCI Mode - Functional Description
9.5.5.1 Serial Data Format
Conventional Baud Rate Generator Mode
The block diagram of the Serial Control Interface
in conventional baud rate generator mode is
shown in Figure 60.
Word length may be selected as being either 8 or 9
bits by programming the M bit in the SCICR1 reg-
ister (see Figure 61).
The TDO pin is in low state during the start bit.
It uses 4 registers:
The TDO pin is in high state during the stop bit.
Two control registers (SCICR1 and SCICR2)
A status register (SCISR)
A baud rate register (SCIBRR)
Extended Prescaler Mode
Two additional prescalers are available in extend-
ed prescaler mode. They are shown in Figure 62.
An Idle character is interpreted as a continuous
logic high level for 10 (or 11) full bit times.
A Break character is a character with a sufficient
number of low level bits to break the normal data
format followed by an extra 1bit to acknowledge
the start bit.
An extended prescaler receiver register (SCIER-
PR)
An extended prescaler transmitter register (SCI-
ETPR)
Figure 61. Word length programming
9-bit Word length (M bit is set)
Data Character
Possible
Parity
Bit
Next Data Character
Next
Start
Bit Bit0
Bit1 Bit2
Bit3
Bit4 Bit5
Bit6
Bit7 Bit8
Stop
Bit
Start
Bit
Idle Line
Start
Bit
Break Character
Extra Start
1Bit
8-bit Word length (M bit is reset)
Possible
Next Data Character
Data Character
Parity
Bit
Next
Start
Bit Bit0
Bit1 Bit2 Bit3
Bit4 Bit5
Bit6
Bit7
Stop
Bit
Start
Bit
Idle Line
Start
Bit
Break Character
Extra
1
Start
Bit
106/294
1

Share Link: 

datasheetbank.com [ Privacy Policy ] [ Request Datasheet ] [ Contact Us ]