256 Kbit / 512 Kbit / 1 Mbit / 2 Mbit Multi-Purpose Flash
SST27SF256 / SST27SF512 / SST27SF010 / SST27SF020
Data Sheet
Start
VPP = VPPH, A9 = VH
Erase 100ms pulse
(CE# = VIL)
VPP = VDD or VSS
A9 = VIL or VIH
Wait for VPP and A9
Recovery Time
Read Device
(CE# = OE# = VIL)
Compare All
bytes to FFH
Yes
Device Passed
No
Device Failed
502 ILL F08a.2
FIGURE 13: CHIP-ERASE ALGORITHM FOR SST27SF256
©2001 Silicon Storage Technology, Inc.
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