SI5328C-C-GMR View Datasheet(PDF) - Silicon Laboratories

Part Name

Description

MFG CO.

SI5328C-C-GMR

ITU-T G.8262 SYNCHRONOUS ETHERNET JITTER-ATTENUATING CLOCK MULTIPLIER

Silicon Laboratories 

Si5328

Register 24.

Bit

D7

D6

D5

D4

Name

Reserved

Type

R

Reset value = 0011 1111

D3

D2

D1

D0

FOS2_MSK FOS1_MSK LOL_MSK

R/W

R/W

R/W

Bit

Name

Function

7:3 Reserved Reserved.

2 FOS2_MSK FOS2_MSK.

Determines if the FOS2_FLG is used in the generation of an interrupt. Writes to this reg-

ister do not change the value held in the FOS2_FLG register.

0: FOS2 alarm triggers active interrupt on INT_C1B output (if INT_PIN=1).

1: FOS2_FLG ignored in generating interrupt output.

1 FOS1_MSK FOS1_MSK.

Determines if the FOS1_FLG is used in the generation of an interrupt. Writes to this reg-

ister do not change the value held in the FOS1_FLG register.

0: FOS1 alarm triggers active interrupt on INT_C1B output (if INT_PIN=1).

1: FOS1_FLG ignored in generating interrupt output.

0

LOL_MSK LOL_MSK.

Determines if the LOL_FLG is used in the generation of an interrupt. Writes to this regis-

ter do not change the value held in the LOL_FLG register.

0: LOL alarm triggers active interrupt on INT_C1B output (if INT_PIN=1).

1: LOL_FLG ignored in generating interrupt output.

Rev. 1.0

37

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