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SC4810BIMLTRT View Datasheet(PDF) - Semtech Corporation

Part Name
Description
MFG CO.
SC4810BIMLTRT Datasheet PDF : 24 Pages
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SC4810B/E
POWER MANAGEMENT
Application Information (Cont.)
VBias
VREF
guaranteed synchronization. SYNC pin should be
grounded if synchronization is unused. (The patent for
the synchronization scheme is pending).
The synchronous function is illustrated as in Fig. 10.
R3
Vout
R4
R5
SC431
R1
FB
R2
GND
Fig.9 Cycle-by-cycle over-current limitation
VFB = 2 VCS + 1.3V........(3)
VFB
=
VREF
R2
R1 + R2
........( 4)
Synchronization
SC4810 features a special synchronization function
which is leading-edge triggered with a threshold set to
2.1V. Applications like multi-phase interleaving can be
achieved using the SYNC pin. When the SYNC pin is con-
nected to the RCT pin of the master SC4810, the out-
puts of the two SC4810’s will be out of phase. The fre-
quency of the master SC4810 clock signal should be at
least 30% faster than that of the slave SC4810 for the
3V
2.1V
Clock Signal of the Master SC4810
VRCT
0V
t
OUT1 of the Master SC4810
0V
t
OUT1 of the Slave SC4810
0V
t
Fig. 10 Illustration for Synchronization
2006 Semtech Corp.
14
www.semtech.com

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