SC4510ITSTRT View Datasheet(PDF) - Semtech Corporation
Part Name
Description
MFG CO.
SC4510ITSTRT Datasheet PDF : 16 Pages
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SC4510
POWER MANAGEMENT
Application Information (Contd.)
In peak current mode control as in SC4510, the voltage
ripple on Cs is critical for PWM operation. In fact, the peak-
to-peak value of the voltage ripple across VCs (denoted as
∆VCs) directly affects the signal-to-noise ratio of the PWM
operation. In general, smaller ∆VCs leads to small signal-to-
noise ratio and more noise sensitive operation. Larger ∆VCs
leads to more circuit (power stage) parameter sensitive
operation. A good engineering compromise is to make
∆VCs~Req∆ Io.
Where ∆ Io is the peak to peak ripple current in the inductor.
The prerequisite for such relation is the so called time
constant matching condition
L
R eq
≈ RsCs.
When Rds1 = Rds2, the above approximations become
precise equalities. For the example in the Application Circuit
shown on p9 the inductor value is 1 uH,
RL= 1.4 mΩ , Rds1 = 11 mΩ and Rds2 = 3 mΩ
Since the operating duty ratio is very small the effective
Rds is determined mostly by Rds2. The time constant RsCs
should be set close to 0.2 mS. Since the effective value of
Rs is 20 kΩ // 18 kΩ = 9.5 kΩ, Cs= 22 nF was chosen .
In the application circuit, Req=5.6 mΩ. However the peak
value of the sensed current is not exact for a number of
reasons. Though the Phase Node PH and Virtual Phase
Node VPN voltages are assumed to be identical, there will
be some offset between them which adds to the average
value of the current feedback signal. This is particularly
true during the switching transitions where rise and fall
times of the true Phase Node are dependent on the power
MOSFET characteristics. The peak value of the signal also
includes the ripple current ∆ Io riding on the output DC
current. In addition, the signal level is subject to variations
with respect to input and PVCC voltages. The difference
between sensed current magnitude and the actual current
gets more pronounced for low output voltages where the
operating duty is also low.
Given these differences, some amount of scaling the
current sense signal is required to adjust the current limit
in most applications. This can be accomplished easily by
simple resistor networks and the possible configurations
are shown in Fig.3.
a) When the required current limit value ILM is greater than
ILMcp, remove Rs3 and solve for for Rs2 = Rseq and
R seq
Cs
=
L
R eq
CURRENT LIMIT SCALING
In SC4510, the current limiting is performed on cycle-by-
cycle basis. When the voltage difference between CS+ and
CS- exceeds 65 mV, the top MOSFET duty ratio is clipped
in order to limit the output source current. Similarly, when
the voltage difference between CS- and CS+ exceeds 113
mV, the bottom MOSFET duty ratio is clipped in order to
limit the sink current. For the configuration in Fig.1, the
convertor output current limit is set around
ILMcp
=
75 mV
Req
,
for the current sourcing mode and
Rseq is the parallel combination of Rs and Rs1 as shown in
Fig 3). Rs2 helps to reduce the offset at the input of current
sense amplifier inside SC4510.
Vin
Cin
Q1
Vgs1
PN
iL(t)
L
Rs
Q2
Vgs2
Vbe3
Q3
VPN
Vbe4
Q4
RL
Rs1
Cs
vC(t)
Vo
Cout Rload
I LMcn
=
− 110 mV
Req
for the current sinking mode.
ISEN
+1
-2
Rs2
Rs3
Fig.3 Current limit scaling.
© 2004 Semtech Corp.
13
www.semtech.com
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