
PSD5XX Family
Figure 58. Asynchronous Clock Mode Timing (Product-Term Clock, PB Macrocell Only)
CLOCK
INPUT
REGISTERED
OUTPUT
tCHA
tCLA
tSA tHA
tCOA
Figure 59. Input to Output Disable/Enable
INPUT
tER
tEA
INPUT TO
OUTPUT
ENABLE/DISABLE
Figure 60. Asynchronous Reset/Preset
RESET/PRESET
INPUT
REGISTER
OUTPUT
tARPW
tARP
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