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PIC18F010T-I/SO View Datasheet(PDF) - Microchip Technology

Part Name
Description
MFG CO.
PIC18F010T-I/SO
Microchip
Microchip Technology 
PIC18F010T-I/SO Datasheet PDF : 176 Pages
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PIC18F010/020
BTG
Bit Toggle f
Syntax:
[ label ] BTG f, b [,a]
Operands:
0 f 255
0b<7
a [0,1]
Operation:
(f<b>) f<b>
Status Affected: None
Encoding:
0111 bbba ffff ffff
Description:
Bit bin data memory location fis
inverted. If ais 0, the Access Bank
will be selected, overriding the BSR
value. If ais 1, the Bank will be
selected as per the BSR value.
Words:
1
Cycles:
1
Q Cycle Activity:
Q1
Q2
Q3
Q4
Decode
Read
register f
Process
Data
Write
register f
Example:
BTG
PORTB, 4
Before Instruction:
PORTB = 0111 0101 [0x35]
After Instruction:
PORTB = 0110 0101 [0x25]
BOV
Branch if Overflow
Syntax:
[ label ] BOV n
Operands:
-128 n 127
Operation:
if overflow bit is 1
(PC) + 2 + 2n PC
Status Affected: None
Encoding:
1110 0100 nnnn nnnn
Description:
If the Overflow bit is 1, then the
program will branch.
The 2s complement number 2nis
added to the PC. Since the PC will
have incremented to fetch the next
instruction, the new address will be
PC+2+2n. This instruction is then
a two-cycle instruction.
Words:
1
Cycles:
1(2)
Q Cycle Activity:
If Jump:
Q1
Q2
Decode
Read literal
n
No
operation
No
operation
If No Jump:
Q1
Q2
Decode
Read literal
n
Q3
Process
Data
No
operation
Q3
Process
Data
Q4
Write to PC
No
operation
Q4
No
operation
Example:
HERE
Before Instruction
PC
=
After Instruction
If Overflow =
PC
=
If Overflow =
PC
=
BOV Jump
address (HERE)
1;
address (Jump)
0;
address (HERE+2)
2001 Microchip Technology Inc.
Preliminary
DS41142A-page 109

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