PIC18F24J10T-I/ML(2009) View Datasheet(PDF) - Microchip Technology

Part Name

Description

MFG CO.

PIC18F24J10T-I/ML
(Rev.:2009)

28/40/44-Pin High-Performance, RISC Microcontrollers

Microchip Technology 

PIC18F45J10 FAMILY

TABLE 1-2: PIC18F24J10/25J10 PINOUT I/O DESCRIPTIONS (CONTINUED)

Pin Name

Pin Number

SPDIP,

Pin Buffer

SOIC, QFN Type Type

SSOP

Description

PORTA is a bidirectional I/O port.

RA0/AN0

RA0

AN0

2 27

I/O TTL Digital I/O.

I Analog Analog Input 0.

RA1/AN1

RA1

AN1

3 28

I/O TTL Digital I/O.

I Analog Analog Input 1.

RA2/AN2/VREF-/CVREF 4

RA2

AN2

VREF-

CVREF

1

I/O TTL Digital I/O.

I Analog Analog Input 2.

I Analog A/D reference voltage (low) input.

O Analog Comparator reference voltage output.

RA3/AN3/VREF+

RA3

AN3

VREF+

5

2

I/O TTL Digital I/O.

I Analog Analog Input 3.

I Analog A/D reference voltage (high) input.

RA5/AN4/SS1/C2OUT 7

RA5

AN4

SS1

C2OUT

4

I/O TTL Digital I/O.

I Analog Analog Input 4.

I TTL SPI slave select input.

O—

Comparator 2 output.

Legend: TTL = TTL compatible input

ST = Schmitt Trigger input with CMOS levels

O = Output

CMOS = CMOS compatible input or output

I

= Input

P

= Power

Note 1: Default assignment for CCP2 when Configuration bit, CCP2MX, is set.

2: Alternate assignment for CCP2 when Configuration bit, CCP2MX, is cleared.

© 2009 Microchip Technology Inc.

DS39682E-page 13

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