ST7FLITE2
Pin No.
Pin Name
Level
Port / Control
Input
Output Main
Functi on
(after reset)
Alternate Function
15
10 PA3/ATPWM1
16
11 PA2/ATPWM0
17
12 PA1/ATIC
18
13 PA0/LTIC
19 - 14 OSC2
20 - 15 OSC1
- 19 - PC1
- 20 - PC0/CLKIN**
I/O CT HS X
I/O CT HS X
I/O CT HS X
I/O CT HS X
O
I
O
I
X
X
ei0
X
X
X X Port A3 Auto-Reload Timer PWM1
X X Port A2
X X Port A1
X X Port A0
Auto-Reload Timer PWM0
Auto-Reload Timer Input
Capture
Lite Timer Input Capture
Resonator oscillator inverter output
Resonator oscillator inverter input
Port C1
Port C0
External clock input**
* available on ST7FDALI only.
** For ST7FDALI, CLKIN on PB4 or PC0 (configurable by option byte). For ST7FLITE2x, CLKIN on PB4.
Note:
In the interrupt input column, “eix” defines the associated external interrupt vector which can be assigned
to one of the I/O pins using the EISR register. If the weak pull-up column (wpu) is merged with the interrupt
column (int), then the I/O configuration is pull-up interrupt input, else the configuration is floating interrupt
input.
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