PCF8533U/2DA/2 View Datasheet(PDF) - NXP Semiconductors.
Part Name
Description
MFG CO.
PCF8533U/2DA/2 Datasheet PDF : 45 Pages
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NXP Semiconductors
PCF8533
Universal LCD driver for low multiplex rates
20
IDD(LCD)
(μA)
16
001aal524
12
8
4
0
3
5
7
9
VLCD (V)
Tamb = 30 °C; 1:4 multiplex; fclk(ext) = 1.536 kHz; all RAM written with logic 1; no display connected.
Fig 19. Typical IDD(LCD) with respect to VLCD
12. Dynamic characteristics
Table 17. Dynamic characteristics
VDD = 1.8 V to 5.5 V; VSS = 0 V; VLCD = 2.5 V to 6.5 V; Tamb = −40 °C to +85 °C; unless otherwise specified.
Symbol Parameter
Conditions
Min Typ Max
Clock
fclk(int)
internal clock frequency
fclk(ext)
external clock frequency
tclk(H)
HIGH-level clock time
tclk(L)
LOW-level clock time
tr
rise time
tf
fall time
Synchronization: input pin SYNC
[1][3] 960
[1][3] 797
130
130
-
-
1 536
1 536
-
-
-
-
3 046
3 046
-
-
-
-
tPD(SYNC_N) SYNC propagation delay
tSYNC_NL
SYNC LOW time
Outputs: pins BP0 to BP3 and S0 to S79
-
30
-
1
-
-
tPD(drv)
driver propagation delay
I2C-bus: timing[2]; see Figure 21
VLCD = 5 V
-
-
30
Pin SCL
fSCL
tLOW
tHIGH
Pin SDA
SCL clock frequency
LOW period of the SCL clock
HIGH period of the SCL clock
-
-
400
1.3
-
-
0.6 -
-
tSU;DAT
tHD;DAT
data set-up time
data hold time
100 -
-
0
-
-
Unit
Hz
Hz
μs
μs
ns
ns
ns
μs
μs
kHz
μs
μs
ns
ns
PCF8533_4
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 04 — 5 March 2010
© NXP B.V. 2010. All rights reserved.
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