PCA8538UG(2014) View Datasheet(PDF) - NXP Semiconductors.

Part Name

Description

MFG CO.

PCA8538UG
(Rev.:2014)

Automotive 102 x 9 Chip-On-Glass LCD segment driver

NXP Semiconductors. 

NXP Semiconductors

PCA8538

Automotive 102 x 9 Chip-On-Glass LCD segment driver

27. Figures

Fig 1. Block diagram of PCA8538 . . . . . . . . . . . . . . . . . .4

Fig 2. Pinning diagram of PCA8538UG . . . . . . . . . . . . . .5

Fig 3. Recommended start-up sequence when using the

internal charge pump and the internal clock

signal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .25

Fig 4. Recommended start-up sequence when using an

external supplied VLCD and the internal clock

signal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .26

Fig 5. Recommended start-up sequence when using the

internal charge pump and an external clock

signal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .26

Fig 6. Recommended start-up sequence when using an

external supplied VLCD and an external clock

signal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .27

Fig 7. Recommended power-down sequence for minimum

power-down current when using the internal charge

pump and the internal clock signal . . . . . . . . . . .27

Fig 8. Recommended power-down sequence when using

an external supplied VLCD and the internal clock

signal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .28

Fig 9. Recommended power-down sequence when using

the internal charge pump and an external clock

signal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .28

Fig 10. Recommended power-down sequence when using

an external supplied VLCD and an external clock

signal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .29

Fig 11. Example of display types suitable for PCA8538 .30

Fig 12. Typical system configuration if using the internal

VLCD generation and I2C-bus . . . . . . . . . . . . . . . .31

Fig 13. Typical system configuration if using the external

VLCD and SPI-bus . . . . . . . . . . . . . . . . . . . . . . . .31

Fig 14. VLCD generation including temperature

compensation . . . . . . . . . . . . . . . . . . . . . . . . . . .33

Fig 15. VLCD programming of PCA8538 (assuming

VT[8:0] = 0h) . . . . . . . . . . . . . . . . . . . . . . . . . . . .34

Fig 16. Charge pump model (used to characterize the

driving strength) . . . . . . . . . . . . . . . . . . . . . . . . . .34

Fig 17. Charge pump driving capability with

VDD2 = 3.0 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . .35

Fig 18. Charge pump driving capability with

VDD2 = 5.0 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . .36

Fig 19. VLCD with respect to Iload at VDD2 = 3 V . . . . . . . .37

Fig 20. VLCD with respect to Iload at VDD2 = 5 V . . . . . . . .37

Fig 21. Temperature measurement block with digital

temperature filter . . . . . . . . . . . . . . . . . . . . . . . . .38

Fig 22. Temperature measurement delay . . . . . . . . . . . .39

Fig 23. Example of segmented temperature coefficients.40

Fig 24. Electro-optical characteristic: relative transmission

curve of the liquid. . . . . . . . . . . . . . . . . . . . . . . . .44

Fig 25. Static drive mode waveforms, line inversion mode

(n = 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .45

Fig 26. Waveforms for the 1:2 multiplex drive mode, 1⁄2 bias,

line inversion mode (n = 1) . . . . . . . . . . . . . . . . .46

Fig 27. Waveforms for the 1:2 multiplex drive mode, 1⁄3 bias,

line inversion mode (n = 1) . . . . . . . . . . . . . . . . .47

Fig 28. Waveforms for the 1:4 multiplex drive mode, 1⁄3 bias,

line inversion mode (n = 1) . . . . . . . . . . . . . . . . . 48

Fig 29. Waveforms for 1:6 multiplex drive mode, 1⁄3 bias,

line inversion mode (n = 1) . . . . . . . . . . . . . . . . . 49

Fig 30. Waveforms for 1:6 multiplex drive mode, 1⁄4 bias,

line inversion mode (n = 1) . . . . . . . . . . . . . . . . . 50

Fig 31. Waveforms for 1:8 multiplex drive mode, 1⁄4 bias,

line inversion mode (n = 1) . . . . . . . . . . . . . . . . . 51

Fig 32. Waveforms for 1:9 multiplex drive mode with 1⁄4 bias

and line inversion mode (n = 1). . . . . . . . . . . . . . 52

Fig 33. Waveforms for 1:9 multiplex drive mode with 1⁄4 bias

and frame inversion mode . . . . . . . . . . . . . . . . . 53

Fig 34. Display RAM bitmap and bank definition . . . . . . 60

Fig 35. Example of bank selection in 1:4 multiplex mode 61

Fig 36. Example of the Input-bank-select and the

Output-bank-select command with multiplex drive

mode 1:4 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61

Fig 37. Control byte format . . . . . . . . . . . . . . . . . . . . . . . 63

Fig 38. I2C-bus - bit transfer . . . . . . . . . . . . . . . . . . . . . . 64

Fig 39. I2C-bus - definition of START and STOP

conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65

Fig 40. I2C-bus - system configuration . . . . . . . . . . . . . . 65

Fig 41. Acknowledgement on the I2C-bus. . . . . . . . . . . . 66

Fig 42. I2C-bus protocol - write mode . . . . . . . . . . . . . . . 67

Fig 43. I2C-bus protocol - read mode . . . . . . . . . . . . . . . 67

Fig 44. SPI-bus protocol - data transfer overview . . . . . . 68

Fig 45. SPI-bus example. . . . . . . . . . . . . . . . . . . . . . . . . 69

Fig 46. SPI-bus protocol - read example. . . . . . . . . . . . . 69

Fig 47. SPI-bus protocol - write example . . . . . . . . . . . . 69

Fig 48. Device protection diagram . . . . . . . . . . . . . . . . . 70

Fig 49. Typical IDD1 with respect to temperature . . . . . . . 75

Fig 50. Typical IDD2 with respect to temperature . . . . . . . 75

Fig 51. Typical IDD3 with respect to temperature . . . . . . . 76

Fig 52. Typical IDD(LCD) with respect to temperature . . . . 76

Fig 53. Typical VLCD variation with respect to

temperature. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77

Fig 54. Typical frame frequency variation with respect to

temperature. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77

Fig 55. Measurement temperature variation with respect to

temperature. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78

Fig 56. Driver timing waveforms . . . . . . . . . . . . . . . . . . . 78

Fig 57. I2C-bus timing . . . . . . . . . . . . . . . . . . . . . . . . . . . 80

Fig 58. SPI-bus timing. . . . . . . . . . . . . . . . . . . . . . . . . . . 81

Fig 59. Recommended ITO connections for the I2C

interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83

Fig 60. Recommended ITO connections for the SPI

interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84

Fig 61. Cascaded configuration with two PCA8538 with

external VLCD and internal clock . . . . . . . . . . . . . 85

Fig 62. Cascaded configuration with two PCA8538 with

internal VLCD and external clock . . . . . . . . . . . . . 86

Fig 63. Cascade configuration for data reading . . . . . . . 88

Fig 64. Bare die outline of PCA8538UG . . . . . . . . . . . . . 89

Fig 65. Alignment marks . . . . . . . . . . . . . . . . . . . . . . . . . 93

Fig 66. Tray details of PCA8538U. . . . . . . . . . . . . . . . . . 95

Fig 67. Die alignment in the tray . . . . . . . . . . . . . . . . . . . 96

PCA8538

Product data sheet

All information provided in this document is subject to legal disclaimers.

Rev. 4 — 26 September 2014

© NXP Semiconductors N.V. 2014. All rights reserved.

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