NAND128-A, NAND256-A, NAND512-A, NAND01G-A
Figure 23. Command Latch AC Waveforms
CL
tCLHWL
(CL Setup time)
tWHCLL
(CL Hold time)
tELWL
(E Setup time)
E
tWHEH
(E Hold time)
tWLWH
W
tALLWL
(ALSetup time)
tWHALH
(AL Hold time)
AL
tDVWH
(Data Setup time)
tWHDX
(Data Hold time)
I/O
Command
Figure 24. Address Latch AC Waveforms
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tCLLWL
(CL Setup time)
CL
tELWL
(E Setup time)
tWLWL
tWLWL
tWLWL
E
tWLWH
tWLWH
tWLWH
tWLWH
W
tALHWL
(AL Setup time)
tWHWL
tWHALL
(AL Hold time)
tWHWL
tWHALL
tWHWL
tWHALL
AL
tDVWH
(Data Setup time)
tDVWH
tWHDX
(Data Hold time)
tDVWH
tWHDX
tDVWH
tWHDX
tWHDX
I/O
Adrress
cycle 1
Adrress
cycle 2
Adrress
cycle 3
Adrress
cycle 4
Note: Address cycle 4 is only required for 512Mb and 1Gb devices.
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