Preliminary Spec.
Some contents are subject to change without notice.
MITSUBISHI LSIs
MH8S64PHC -7,-8,-10
536870912-BIT (8388608 - WORD BY 64-BIT)SynchronousDRAM
Page Mode Burst Read (multi bank) @BL=4 CL=3
CLK
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17
/CS
/RAS
/CAS
tRRD
tRCD
/WE
CKE
DQM
DQM read latency=2
A0-8
X
XY
Y
Y
Y
A10
X
X
A9,11
X
X
BA0,1
DQ
0
10
0
1
0
CL=3
CL=3
CL=3
Q0 Q0 Q0 Q0 Q0 Q0 Q0 Q0 Q1 Q1 Q1 Q1
ACT#0
READ#0
ACT#1
READ#0
READ#1
READ#0
Italic parameter indicates minimum case
MIT-DS-0282-0.0
MITSUBISHI
ELECTRIC
( 42 / 55 )
9/ Dec. /1998