M29W128GL70N6F View Datasheet(PDF) - Numonyx -> Micron

Part Name

Description

MFG CO.

M29W128GL70N6F

128 Mbit (16 Mb x 8 or 8 Mbx 16, page, uniform block) 3 V supply Flash memory

Numonyx -> Micron 

M29W128GH, M29W128GL

Signal descriptions

2.9

Reset (RP)

The Reset pin can be used to apply a Hardware Reset to the memory.

A Hardware Reset is achieved by holding Reset Low, VIL, for at least tPLPX. After Reset goes

High, VIH, the memory will be ready for Bus Read and Bus Write operations after tPHEL or

tRHEL, whichever occurs last. See Section 2.10: Ready/Busy output (RB), Table 29: Reset

AC characteristics, Figure 21 and Figure 22 for more details.

2.10

Ready/Busy output (RB)

The Ready/Busy pin is an open-drain output that can be used to identify when the device is

performing a program or erase operation. During program or erase operations Ready/Busy

is Low, VOL (see Table 20: Status Register bits). Ready/Busy is high-impedance during

Read mode, Auto Select mode and Erase Suspend mode.

After a Hardware Reset, Bus Read and Bus Write operations cannot begin until Ready/Busy

becomes high-impedance. See Table 29: Reset AC characteristics, Figure 21 and

Figure 22.

The use of an open-drain output allows the Ready/Busy pins from several memories to be

connected to a single pull-up resistor. A Low will then indicate that one, or more, of the

memories is busy.

2.11

Byte/word organization select (BYTE)

It is used to switch between the x 8 and x 16 Bus modes of the memory. When Byte/word

organization select is Low, VIL, the memory is in x 8 mode, when it is High, VIH, the memory

is in x 16 mode.

2.12

2.13

VCC supply voltage

VCC provides the power supply for all operations (Read, Program and Erase).

The command interface is disabled when the VCC supply voltage is less than the Lockout

voltage, VLKO. This prevents Bus Write operations from accidentally damaging the data

during power-up, power-down and power surges. If the Program/Erase controller is

programming or erasing during this time then the operation aborts and the memory contents

being altered will be invalid.

A 0.1 µF capacitor should be connected between the VCC supply voltage pin and the VSS

ground pin to decouple the current surges from the power supply. The PCB track widths

must be sufficient to carry the currents required during program and erase operations (see

ICC1, ICC2, ICC3 in Table 25: DC characteristics).

VCCQ input/output supply voltage

VCCQ provides the power supply to the I/O pins and enables all outputs to be powered

independently from VCC.

15/94

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