M25PE10-VMN6TG View Datasheet(PDF) - STMicroelectronics

Part Name

Description

MFG CO.

M25PE10-VMN6TG

1 and 2 Mbit, low voltage, Page-Erasable Serial Flash memories with Byte-Alterability, 50 MHz SPI bus, standard pinout

STMicroelectronics 

M25PE20, M25PE10

5

Memory organization

Memory organization

The M25PE20 memory is organized as:

● 1024 pages (256 Bytes each).

● 262,144 Bytes (8 bits each)

● 64 subsectors (32 Kbits, 4096 bytes each)

● 4 sectors (512 Kbits, 65536 Bytes each)

The M25PE10 memory is organized as:

● 512 pages (256 Bytes each).

● 131,074 Bytes (8 bits each)

● 32 subsectors (32 Kbits, 4096 bytes each)

● 2 sectors (512 Kbits, 65536 Bytes each)

In the M25PE20 and M25PE10, each page can be individually:

● programmed (bits are programmed from 1 to 0)

● erased (bits are erased from 0 to 1)

● written (bits are changed to either 0 or 1)

The device is Page or Sector Erasable (bits are erased from 0 to 1).

Table 5. M25PE20 memory organization

Sector

Subsector

63

3

48

47

2

32

31

1

16

15

Address range

3F000h

3FFFFh

30000h

2F000h

30FFFh

2FFFFh

20000h

1F000h

20FFFh

1FFFFh

10000h

0F000h

10FFFh

0FFFFh

4

04000h

04FFFh

0

3

03000h

03FFFh

2

02000h

02FFFh

1

01000h

01FFFh

0

00000h

00FFFh

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