M24C64-FMH6TP View Datasheet(PDF) - STMicroelectronics
Part Name
Description
MFG CO.
M24C64-FMH6TP Datasheet PDF : 45 Pages
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Revision history
11
Revision history
M24C64-W M24C64-R M24C64-F
Table 26. Document revision history
Date
Revision
Changes
14-Mar-2011
07-Apr-2011
18-May-2011
Updated information concerning E2, E1, E0 for the WLCSP package:
– note under Figure 3: UFDFPN5 package connections
22
– comment under Figure 6: Chip enable inputs connection
– note 3 under Table 2: Device select code
23
Updated MLP8 package data and Section 10: Part numberingAdded
footnote (a) in Section 4.5: Memory addressing.
Updated:
– Figure 3: UFDFPN5 package connections
– Table 5: Absolute maximum ratings
24
– Small text changes
Added:
– Figure 12: Memory cell characteristics
08-Sep-2011
16-Dec-2011
Updated:
– Table 22: UFDFPN8 (MLP8) – package dimensions (UFDFPN: Ultra
thin Fine pitch Dual Flat Package, No lead)
– Figure 15: Maximum Rbus value versus bus parasitic capacitance
Cbus) for an I2C bus at maximum frequency fC = 1MHz
25
– Figure 6: I2C Fast mode Plus (fC = 1 MHz): maximum Rbus value
versus bus parasitic capacitance (Cbus).
Added tWLDL and tDHWH in:
– Table 16: 400 kHz AC characteristics
– Table 17: 1 MHz AC characteristics
– Figure :
Minor text changes.
26
Updated A dimension in Table 23: WLCSP 5-bump wafer-length chip-
scale package mechanical data (M24C64-FCS6TP/K).
42/45
DocID16891 Rev 30
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