LTC4210-3/LTC4210-4
APPLICATIO S I FOR ATIO
Calculating Current Limit
For a selected RSENSE, the nominal load current is given by
Equation 1. The minimum load current is given by
Equation 2:
ILIMIT(MIN)
=
VCB(MIN)
RSENSE(MAX)
=
44mV
RSENSE(MAX)
(2)
where
RSENSE(MAX)
=
RSENSE
•
⎛
⎝⎜
1+
RTOL
100
⎞
⎠⎟
The maximum load current is given by Equation 3:
ILIMIT(MAX)
=
VCB(MAX)
RSENSE(MIN)
=
56mV
RSENSE(MIN)
(3)
where
RSENSE(MIN)
=
RSENSE
•
⎛
⎝⎜
1–
RTOL
100
⎞
⎠⎟
If a 7mΩ sense resistor with ±1% tolerance is used for
current limiting, the nominal current limit is 7.14A.
From Equations 2 and 3, ILIMIT(MIN) = 6.22A and
ILIMIT(MAX) = 8.08A. For proper operation, the minimum
current limit must exceed the circuit maximum operat-
ing load current with margin. The sense resistor power
rating must exceed VCB(MAX)2/RSENSE(MIN).
Frequency Compensation
A compensation circuit should be connected to the GATE
pin for current limit loop stability.
Method 1
The simplest frequency compensation network consists
of RC and CC (Figure 2a). The total GATE capacitance is:
CGATE = CISS + CC
(4)
Generally, the compensation value in Figure 2a is suffi-
cient for a pair of input wires less than a foot in length.
Applications with longer input wires may require the RC or
CC value to be increased for better fault transient perfor-
mance. For a pair of three foot input wires, users can start
with CC = 47nF and RC = 100Ω. Despite the wire length, the
general rule for AC stability required is CC ≥ 8nF and RC ≤
1kΩ.
Method 2
The compensation network in Figure 2b is similar to the
circuitry used in method 1 but with an additional gate
resistor RG. The RG resistor helps to minimize high
frequency parasitic oscillations frequently associated with
the power MOSFET. In some applications, the user may
find that RG helps in short-circuit transient recovery as
well. However, too large of an RG value will slow down the
turn-off time. The recommended RG range is between 5Ω
and 500Ω. RG limits the current flow into the GATE pin’s
internal zener clamp during transient events. The recom-
mended RC and CC values are the same as method 1. The
parasitic compensation capacitor CP is required when 0.2µF
< load capacitance CL < 9µF, otherwise it is optional.
RSENSE
Q1
VIN
5V
0.007Ω
Si4410DY
+
VOUT
6
5
CL
VCC SENSE
LTC4210*
4
GATE
RC
100Ω
*ADDI
OMIT
**USE
OTHE
(2a)
CC
10nF
*ADDITIONAL DETAILS
OMITTED FOR CLARITY
Method 1
**USE CP IF 0.2µF < CL < 9µF,
OTHERWISE NOT REQUIRED
RSENSE
Q1
VIN
0.007Ω
Si4410DY
12V
6
5
VCC SENSE
LTC4210*
4
GATE
RG
200Ω
+
CP**
2.2nF
VOUT
CL
(2b)
RC
100Ω
CC
10nF
4210 F02
Method 2
Figure 2. Frequency Compensation
Parasitic MOSFET Oscillation
There are two possible parasitic oscillations when the
MOSFET operates as a source follower when ramping at
421034fa
9