LTC4069
Applications Information
with low impedance leads. Excessive lead length, however,
may add enough series inductance to require a bypass
capacitor of at least 1µF from BAT to GND. Furthermore,
a 4.7µF capacitor with a 0.2Ω to 1Ω series resistor from
BAT to GND is required to keep ripple voltage low when
the battery is disconnected.
High value capacitors with very low ESR (especially ceram-
ic) may reduce the constant-voltage loop phase margin.
Ceramic capacitors up to 22µF may be used in parallel
with a battery, but larger ceramics should be decoupled
with 0.2Ω to 1Ω of series resistance.
In constant-current mode, the PROG pin is in the feedback
loop, not the battery. Because of the additional pole created
by the PROG pin capacitance, capacitance on this pin must
be kept to a minimum. With no additional capacitance on
the PROG pin, the charger is stable with program resistor
values as high as 25k. However, additional capacitance on
this node reduces the maximum allowed program resis-
tor. The pole frequency at the PROG pin should be kept
above 100kHz. Therefore, if the PROG pin is loaded with
a capacitance, CPROG, the following equation should be
used to calculate the maximum resistance value for RPROG:
RPROG
≤
2π
•
1
105 •
CPROG
Average, rather than instantaneous, battery current may be
of interest to the user. For example, if a switching power
supply operating in low current mode is connected in
parallel with the battery, the average current being pulled
out of the BAT pin is typically of more interest than the
instantaneous current pulses. In such a case, a simple RC
filter can be used on the PROG pin to measure the average
battery current as shown in Figure 5. A 10k resistor has
been added between the PROG pin and the filter capacitor
to ensure stability.
5V WALL
ADAPTER
750mA
ICHG
USB
POWER
500mA
ICHG
ICHG
BAT
D1 LTC4069
SYSTEM
LOAD
VCC
MP1
PROG
+ Li-Ion
BATTERY
MN1 4.02k
1k
2k
4069 F04
Figure 4. Combining Wall Adapter and USB Power
LTC4069
PROG
GND
10k
RPROG
CFILTER
CHARGE
CURRENT
MONITOR
CIRCUITRY
4069 F05
Figure 5. Isolating Capacitive Load on the PROG Pin and Filtering
Power Dissipation
The conditions that cause the LTC4069 to reduce charge
current through thermal feedback can be approximated
by considering the power dissipated in the IC. For high
charge currents, the LTC4069 power dissipation is ap-
proximately:
PD = (VCC – VBAT) • IBAT
where PD is the power dissipated, VCC is the input supply
voltage, VBAT is the battery voltage and IBAT is the charge
current. It is not necessary to perform any worst-case
power dissipation scenarios because the LTC4069 will
automatically reduce the charge current to maintain the
die temperature at approximately 115°C. However, the
For more information www.linear.com/LTC4069
4069fc
13