LTC4061
MOSFET, MP1, is used to prevent back conducting into the
USB port when a wall adapter is present and a Schottky
diode, D1, is used to prevent USB power loss through the
1kΩ pull-down resistor.
Typically a wall adapter can supply more current than
the 500mA limited USB port. Therefore, an N-channel
MOSFET, MN1, and an extra 3.3kΩ program resistor are
used to increase the charge current to 800mA when the
wall adapter is present.
5V WALL
ADAPTER
ICHG = 800mA
USB POWER
ICHG = 500mA MP1
D1
VCC
BAT
LTC4061
IDET
C/5
PROG
3.3k
SYSTEM
LOAD
+ Li-Ion
BATTERY
1k
MN1
2k 1.25k
4061 F08
Figure 8. Combining Wall Adapter and USB Power
Package Description
DD Package
10-Lead Plastic DFN (3mm × 3mm)
(Reference LTC DWG # 05-08-1699 Rev C)
0.70 p0.05
R = 0.125
TYP
6
0.40 p 0.10
10
3.55 p0.05
1.65 p0.05
2.15 p0.05 (2 SIDES)
PIN 1
PACKAGE TOP MARK
OUTLINE (SEE NOTE 6)
0.25 p 0.05
0.50
BSC
2.38 p0.05
(2 SIDES)
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
0.200 REF
3.00 p0.10 1.65 p 0.10
(4 SIDES) (2 SIDES)
PIN 1 NOTCH
R = 0.20 OR
0.35 s 45o
CHAMFER
0.75 p0.05
(DD) DFN REV C 0310
5
1
0.25 p 0.05
0.50 BSC
0.00 – 0.05
2.38 p0.10
(2 SIDES)
BOTTOM VIEW—EXPOSED PAD
NOTE:
1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-2).
CHECK THE LTC WEBSITE DATA SHEET FOR CURRENT STATUS OF VARIATION ASSIGNMENT
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE
TOP AND BOTTOM OF PACKAGE
4061fd
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