LTC3548
APPLICATIONS INFORMATION
VIN = 2.5V*
TO 5.5V
C1
10μF
VOUT2 = 2.5V*
AT 400mA
L2
4.7μH
C5, 68pF
RUN2 VIN RUN1
MODE/SYNC POR
LTC3548
SW2
SW1
R5
100k
POWER-ON
RESET
L1
2.2μH
C4, 33pF
C3
4.7μF
R4
887k R3
280k
VFB2
VFB1
GND
R2
R1 604k
301k
VIN
VOUT1 = 1.8V
AT 800mA
VOUT2
C5
C2
10μF
R4
COUT2
CIN
RUN2 VIN RUN1
MODE/SYNC
POR
LTC3548
L2
L1
SW2
SW1
C4
VFB2
VFB1
GND
R2
R3
R1
VOUT1
COUT1
C1, C2, C3: TAIYO YUDEN JMK212BJ106MG
C3: TAIYO YUDEN JMK212BJ475MG
L1: MURATA LQH32CN2R2M11
L2: MURATA LQH32CN4R7M23
*VOUT CONNECTED TO VIN FOR VIN ≤ 2.8V (DROPOUT)
3548 F03
BOLD LINES INDICATE HIGH CURRENT PATHS
3548 F04
Figure 3. LTC3548 Typical Application
Figure 4. LTC3548 Layout Diagram (See Board Layout Checklist)
TYPICAL APPLICATIO S
Low Ripple Buck Regulators Using Ceramic Capacitors
VIN = 2.5V
TO 5.5V
C1
10μF
VOUT2 = 1.8V
AT 400mA
L2
10μH
C5, 68pF
RUN2 VIN RUN1
POR
LTC3548
SW2
SW1
R5
100k
POWER-ON
RESET
L1
4.7μH
C4, 33pF
VOUT1 = 1.2V
AT 800mA
VFB2
VFB1
C3
R4
887k R3
MODE/SYNC GND
R2
R1 604k
C2
10μF
442k
604k
10μF
C1, C2, C3: TDK C2012X5R0J106M
L1: SUMIDA CDRH2D18/HP-4R7NC
L2: SUMIDA CDRH2D18/HP-100NC
3548 TA03
Efficiency vs Load Current
100
95
1.8V
90
85
1.2V
80
75
70
65
60 VIN = 3.3V
55 PULSE SKIP MODE
NO LOAD ON OTHER CHANNEL
50
10
100
LOAD CURRENT (mA)
1000
3548 TA03b
3548fa
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