LTC2925IGN(RevD) View Datasheet(PDF) - Linear Technology

Part Name

Description

MFG CO.

LTC2925IGN
(Rev.:RevD)

Multiple Power Supply Tracking Controller with Power Good Timeout

Linear Technology 

Applications Information

LTC2925

1V/DIV

MASTER

SLAVE2

SLAVE1

SLAVE3

1V/DIV

10ms/DIV

10ms/DIV

2925 F11

Figure 11. Coincident Tracking from Figure 12

Coincident Tracking Example

A typical four supply application is shown in Figure 12.

The master signal is a 3.3V module. The slave 1 supply

is a 1.8V switching power supply, the slave 2 supply is a

2.5V switching power supply, and the slave 3 supply is

a 1.5V supply. All three slave supplies track coincidently

with the 3.3V supply that is controlled with an external FET.

The ramp rate of the supplies is 100V/s. The 3-step design

procedure detailed previously can be used to determine

component values. Only the slave 1 supply is considered

here as the procedure is the same for the other supplies.

1. Set the ramp rate of the master signal.

From Equation 1:

CGATE

=

10µA

100V/s

=

0.1µF

2. Solve for the pair of resistors that provide the desired

slave supply behavior, assuming no delay.

From Equation 2:

RTB

=

16.5k

•

100V/s

100V/s

=

16.5k

From Equation 3:

RTA ʹ

=

1.235V

+

0.8V

1.235V

–

0.8V

≈ 13k

16.5k 35.7k 16.5k

3. Choose RTA to obtain the desired delay.

Since no delay is desired, RTA = RTA´.

In this example, all supplies remain low while the ON pin

is held below 1.23V. When the ON pin rises above 1.23V,

10µA pulls up CGATE and the gate of the FET at 100V/s.

As the gate of the FET rises, the source follows and pulls

up the output to 3.3V at 100V/s. This output serves as

the master signal and is buffered from the RAMP pin

to the RAMPBUF pin. As this output and the RAMPBUF

pin rise, the current from the TRACKx pins is reduced.

Consequently, the voltages at the slave supplies’ outputs

increase, and the slave supplies track the master supply.

When the ON pin is again pulled below 1.23V, 10µA will

pull down CGATE and the gate of the FET at 100V/s. If the

loads on the outputs are sufficient, all outputs will track

down coincidently at 100V/s.

3.3V VIN

0.1µF

0.015Ω

Q1

Si4412ADY

CGATE

10Ω 0.1µF

MASTER

RONB

138k

RONA

100k

VIN

10k

VIN

10k

RTB1

16.5k

RTA1

13k

RTA2

41.2k

RTB2

88.7k

RTB3

86.6k

RTA3

100k

VCC SENSEP SENSEN GATE

ON

REMOTE

RAMP

PGI

SD1

FB1

SUPPLY

MONITOR

RST

3.3V

RUN/SS

IN

DC/DC

FB = 1.235V OUT

STATUS

LTC2925

SD2

FAULT

FB2

RAMPBUF

TRACK1

TRACK2

SD3

FB3

TRACK3

GND SCTMR

SDTMR

PGTMR

CSCTMR

0.47µF

CSDTMR

0.082µF

CPGTMR

0.82µF

RFA1 RFB1

35.7k 16.5k

3.3V

RUN/SS

IN

DC/DC

FB = 0.8V OUT

RFA2 RFB2

41.2k 88.7k 3.3V

RUN/SS

IN

DC/DC

FB = 0.8V OUT

RFA3

100k

RFB3

86.6k

1.8V

SLAVE1

2.5V

SLAVE2

1.5V

SLAVE3

2925 F12

Figure 12. Coincident Tracking Example

For more information www.linear.com/LTC2925

2925fd

15

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