LTC1407C-1 View Datasheet(PDF) - Linear Technology

Part Name

Description

MFG CO.

LTC1407C-1

Serial 12-Bit/14-Bit, 3Msps Simultaneous Sampling ADCs with Shutdown

Linear Technology 

LTC1407-1/LTC1407A-1

APPLICATIO S I FOR ATIO

INTERNAL REFERENCE

The LTC1407-1/LTC1407A-1 have an on-chip, tempera-

ture compensated, bandgap reference that is factory

trimmed near 2.5V to obtain a precise ±1.25V input span.

The reference amplifier output VREF, (Pin 3) must be by-

passed with a capacitor to ground. The reference ampli-

fier is stable with capacitors of 1µF or greater. For the best

noise performance, a 10µF ceramic or a 10µF tantalum in

parallel with a 0.1µF ceramic is recommended. The VREF

pin can be overdriven with an external reference as shown

in Figure␣ 3. The voltage of the external reference must be

higher than the 2.5V of the open-drain P-channel output

of the internal reference. The recommended range for an

external reference is 2.55V to VDD. An external reference

at 2.55V will see a DC quiescent load of 0.75mA and as

much as 3mA during conversion.

nonlinearity errors (DNL) are largely independent of the

common mode voltage. However, the offset error will

vary. CMRR is typically better than 60dB.

Figure 5 shows the ideal input/output characteristics for

the LTC1407-1/LTC1407A-1. The code transitions occur

midway between successive integer LSB values (i.e.,

0.5LSB, 1.5LSB, 2.5LSB, FS – 1.5LSB). The output code

is 2’s complement with 1LSB = 2.5V/16384 = 153µV for

the LTC1407A-1 and 1LSB = 2.5V/4096 = 610µV for the

LTC1407-1. The LTC1407A-1 has 1LSB RMS of Gaussian

white noise. Figure 6a shows the LTC1819 converting a

single ended input signal to differential input signals for

optimum THD and SFDR performance as shown in the FFT

plot (Figure 6b).

0

–20

3V REF

3

10µF

11

VREF

LTC1407-1/

LTC1407A-1

GND

14071 F02

Figure 3

INPUT SPAN VERSUS REFERENCE VOLTAGE

The differential input range has a unipolar voltage span

that equals the difference between the voltage at the

reference buffer output VREF (Pin 3) and the voltage at the

Exposed Pad ground. The differential input range of ADC

is –1.25V to 1.25V when using the internal reference. The

internal ADC is referenced to these two nodes. This

relationship also holds true with an external reference.

–40

–60

CH0 CH1

–80

–100

–120

100 1k 10k 100k 1M 10M 100M

FREQUENCY (Hz)

14071 G15

Figure 4. CMRR vs Frequency

011...111

011...110

011...101

DIFFERENTIAL INPUTS

The ADC will always convert the bipolar difference of

CH0+ minus CH0– or the bipolar difference of CH1+ minus

CH1–, independent of the common mode voltage at either

set of inputs. The common mode rejection holds up at

high frequencies (see Figure 4). The only requirement is

that both inputs not go below ground or exceed VDD.

Integral nonlinearity errors (INL) and differential

14

100...010

100...001

100...000

–FS

FS – 1LSB

INPUT VOLTAGE (V)

14071 F05

Figure 5. LTC1407-1/LTC1407A-1 Transfer Characteristic

14071f

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