LTC1350I(Rev0) View Datasheet(PDF) - Linear Technology

Part Name

Description

MFG CO.

LTC1350I
(Rev.:Rev0)

3.3V Low Power EIA/TIA-562 3-Driver/5-Receiver Transceiver

Linear Technology 

LTC1350

PI FU CTIO S

VCC: 3.3V Input Supply Pin. Supply current is typically

35µA in the SHUTDOWN mode. This pin should be de-

coupled with a 0.1µF ceramic capacitor.

GND: Ground Pin.

ON/OFF: TTL/CMOS Compatible Shutdown Pin. A logic

low puts the device in the SHUTDOWN mode with receiv-

ers 4 and 5 kept alive and the supply current equal to 35µA.

All driver and other receiver outputs are in high impedance

state. This pin cannot float.

V+: Positive Supply Output. V+ ≅ 2VCC – 1V. This pin

requires an external capacitor (C = 0.1µF) for charge

storage. The capacitor may be tied to ground or VCC. With

multiple devices, the V + and V – pins may be paralleled into

common capacitors. For a large number of devices, in-

creasing the size of the shared common storage capaci-

tors is recommended to reduce ripple.

V–: Negative Supply Output. V – ≅ – (2VCC – 1.3V). This

pin requires an external capacitor (C = 0.1µF) for charge

storage.

C1+, C1–, C2+, C2–: Commutating Capacitor Inputs. These

pins require two external capacitors (C = 0.1µF): one from

C1+ to C1– and another from C2+ to C2 –. To maintain

charge pump efficiency, the capacitor’s effective series

resistance should be less than 20Ω.

DR IN: EIA/TIA-562 Driver Input Pins. Inputs are TTL/

CMOS compatible. Inputs should not be allowed to float.

Tie unused inputs to VCC.

DR OUT: Driver Outputs at EIA/TIA-562 Voltage Levels.

Outputs are in a high impedance state when in the SHUT-

DOWN mode or VCC = 0V. The driver outputs are protected

against ESD to ±10kV for human body model discharges.

RX IN: Receiver Inputs. These pins can be forced to ±25V

without damage. The receiver inputs are protected against

ESD to ±10kV for human body model discharges. Each

receiver provides 0.4V of hysteresis for noise immunity.

RX OUT: Receiver Outputs with TTL/CMOS Voltage Lev-

els. Receiver 1, 2 and 3 outputs are in a high impedance

state when in SHUTDOWN mode to allow data line sharing.

Receivers 4 and 5 are kept alive in SHUTDOWN.

UW

W

SWITCHI G TI E WAVEFOR S

DR

INPUT

1.4V

DR

OUTPUT

0V

t LHD

1.4V

t HLD

VCC

0V

V+

0V

V–

LTC1350 • F01

Figure 1. Driver Propagation Delay Timing

RX

1.7V

INPUT

RX

OUTPUT

0.8V

t LHR

VCC

1.3V

0V

t HLR

2.4V VCC

0V

LTC1350 • F02

Figure 2. Receiver Propagation Delay Timing

5

Share Link: