LTC1290DM(Rev_C) View Datasheet(PDF) - Linear Technology
Part Name
Description
MFG CO.
LTC1290DM Datasheet PDF : 28 Pages
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LTC1290
APPLICATI S I FOR ATIO
Hardware and Software Interface to Motorola
MC68HC05C4 Processor
LTC1290
MC68HC05C4
CS
CO
ANALOG
•
INPUTS
•
•
•
SCLK
DIN
DOUT
SCK
MOSI
MISO
LTC1290 • AI09
DOUT from LTC1290 Stored in MC68HC05C4 RAM
MSB*
LOCATION $61 B11 B10 B9 B8 B7 B6 B5 B4 BYTE 1
LSB
LOCATION $62 B3 B2 B1 B0 0 0
0
0 BYTE 2
*B11 IS MSB IN UNIPOLAR OR SIGN BIT IN BIPOLAR
MC68HC05C4 Code
MNEMONIC
START
LDA #$50
STA $0A
LDA #$FF
STA $06
LDA #$0F
STA $50
BCLR 0,$20
LDA $50
STA $0C
NOP
LDA $0B
LDA $0C
STA $61
STA $0C
NOP
BSET 0,$02
LDA $0B
LDA $0C
STA $62
COMMENTS
Configuration Data for SPCR
Load Data Into SPCR ($0A)
Config. Data for Port C DDR
Load Data Into Port C DDR
Load LTC1290 DIN Data Into ACC
Load LTC1290 DIN Data Into $50
CO Goes Low (CS Goes Low)
Load DIN Into ACC from $50
Load DIN Into SPI, Start SCK
8 NOPs for Timing
Check SPI Status Reg
Load LTC1290 MSBs Into ACC
Store MSBs in $61
Start Next SPI Cycle
6 NOPs for Timing
CO Goes High (CS Goes High)
Check SPI Status Register
Load LTC1290 LSBs Into ACC
Store LSBs in $62
Parallel Port Microprocessors
When interfacing the LTC1290 to an MPU which has a
parallel port, the serial signals are created on the port with
software. Three MPU port lines are programmed to create
the CS, SCLK and DIN signals for the LTC1290. A fourth
port line reads the DOUT line. An example is made of the
Intel 8051/8052/80C252 family.
Intel 8051
To interface to the 8051, the LTC1290 is programmed for
MSB-first format and 12-bit word length. The 8051 gener-
ates CS, SCLK and DIN on three port lines and reads DOUT
on the fourth.
Hardware and Software Interface to Intel 8051 Processor
LTC1290
•
•
•
ANALOG
•
INPUTS
•
•
•
•
DOUT
DIN
SCLK
CS
ACLK
8051
P1.1
P1.2
P1.3
P1.4
ALE
LTC1290 • AI10
DOUT from LTC1290 Stored in 8051 RAM
MSB*
R2 B11 B10 B9 B8 B7 B6 B5 54
LSB
R3 B3 B2 B1 B0 0 0
0
0
*B11 IS MSB IN UNIPOLAR OR SIGN BIT IN BIPOLAR
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