M48T248Y, M48T248V
Data Retention Mode
Data can be read or written only when VCC is
greater than VPFD. When VCC is below VPFD (the
point at which write protection occurs), the clock
registers and the SRAM are blocked from any ac-
cess. When VCC falls below the Battery Switch
Over threshold (VSO), the device is switched from
VCC to battery backup (VBAT). RTC operation and
SRAM data are maintained via battery backup un-
til power is stable. All control, data, and address
signals must be powered down when VCC is pow-
ered down.
The lithium power source is designed to provide
power for RTC activity as well as RTC and RAM
data retention when VCC is absent or unstable.
The capability of this source is sufficient to power
the device continuously for the life of the equip-
ment into which it has been installed. For specifi-
cation purposes, life expectancy is ten (10) years
at 25°C with the internal oscillator running without
VCC. Each unit is shipped with its energy source
disconnected, guaranteeing full energy capacity.
When VCC is first applied at a level greater than
VPFD, the energy source is enabled for battery
backup operation. The actual life expectancy will
be much longer if no battery energy is used (e.g.,
when VCC is present).
Figure 9. Power Down/Up Mode AC Waveforms
VCC
tF
tR
VPFD (max)
VPFD (min)
VSO
tFB
tPD
tREC
CE
tDR
AI04236
Table 9. Power Down/Up Trip Points DC Characteristics
Symbol
Parameter(1)
Min
Max
Unit
tREC
VPFD (max) to CE low
1.5
2.5
ms
tF
VPFD (max) to VPFD (min) VCC Fall Time
300
µs
tFB
VPFD (min) to VSO VCC Fall Time
10
µs
tR
VPFD (min) to VPFD (max) VCC Rise Time
0
µs
tPD
CE High to Power-Fail
0
µs
tDR(2)
Expected Data Retention Time
10
Years
Note: 1. Valid for Ambient Operating Temperature: TA = 0 to 70°C; VCC = 4.5 to 5.5V or 3.0 to 3.6V (except where noted).
2. At 25°C, VCC = 0V; the expected tDR is defined as cumulative time in the absence of VCC with the clock oscillator running.
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