JS28F128J3C-110 View Datasheet(PDF) - Intel
Part Name
Description
MFG CO.
JS28F128J3C-110 Datasheet PDF : 72 Pages
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256-Mbit J3 (x8/x16)
9.0
Bus Operations
This section provides an overview of device bus operations. The on-chip Write State Machine
(WSM) manages all erase and program algorithms. The system CPU provides control of all in-
system read, write, and erase operations of the device via the system bus.
Device commands are written to the CUI to control all of the flash memory device’s operations.
The CUI does not occupy an addressable memory location; it’s the mechanism through which the
flash device is controlled.
9.1
Bus Operations Overview
The local CPU reads and writes flash memory in-system. All bus cycles to or from the flash
memory conform to standard microprocessor bus cycles.
Table 12. Bus Operations
Mode
RP# CE[2:0](1) OE#(2) WE#(2) Address VPEN
Data(3)
STS
(default
mode)
Notes
Read Array
VIH Enabled
VIL
VIH
X
X
Output Disable
VIH Enabled
VIH
VIH
X
X
Standby
VIH Disabled
X
X
X
X
Reset/Power-Down
Mode
VIL
X
X
X
X
X
DOUT
High Z
High Z
High Z
High Z(7)
X
X
High Z(7)
4,5,6
Read Identifier Codes VIH Enabled
VIL
VIH
See
Table 17
X
Note 8
High Z(7)
Read Query
See
VIH Enabled
VIL
VIH
Table
X
10.3
Note 9
High Z(7)
Read Status (WSM off) VIH Enabled
VIL
VIH
X
X
DOUT
D7 = DOUT
Read Status (WSM on) VIH Enabled
VIL
VIH
X
X D[15:8] = High Z
D[6:0] = High Z
Write
VIH Enabled
VIH
VIL
X
VPENH
DIN
X
6,10,11
NOTES:
1. See Table 13 on page 33 for valid CE configurations.
2. OE# and WE# should never be enabled simultaneously.
3. D refers to D[7:0] if BYTE# is low and D[15:0] if BYTE# is high.
4. Refer to DC Characteristics. When VPEN ≤ VPENLK, memory contents can be read, but not altered.
5. X can be VIL or VIH for control and address signals, and VPENLK or VPENH for VPEN. See DC Characteristics for VPENLK and
VPENH voltages.
6. In default mode, STS is VOL when the WSM is executing internal block erase, program, or lock-bit configuration algorithms. It
is VOH when the WSM is not busy, in block erase suspend mode (with programming inactive), program suspend mode, or
reset/power-down mode.
7. High Z will be VOH with an external pull-up resistor.
8. See Section 10.2, “Read Identifier Codes” on page 39 for read identifier code data.
9. See Section 10.3, “Read Query/CFI” on page 41 for read query data.
10.Command writes involving block erase, program, or lock-bit configuration are reliably executed when VPEN = VPENH and VCC
is within specification.
32
Datasheet
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