CS8422-DNZ View Datasheet(PDF) - Cirrus Logic

Part Name

Description

MFG CO.

CS8422-DNZ

24-bit, 192-kHz, Asynchronous Sample Rate Converter with Integrated Digital Audio Interface Receiver

Cirrus Logic 

OLRCK

OSCLK

SDOUT/

TDM_IN

OLRCK

OSCLK

SDOUT/

TDM_IN

CS8422

MSB

SDOUT 4, ch A

32 OSCLKs

MSB

SDOUT 4, ch B

32 OSCLKs

MSB

SDOUT 3, ch A

32 OSCLKs

MSB

SDOUT 3, ch B

32 OSCLKs

MSB

SDOUT 2, ch A

32 OSCLKs

MSB

SDOUT 2, ch B

32 OSCLKs

MSB

SDOUT 1, ch A

32 OSCLKs

MSB

SDOUT 1, ch B

32 OSCLKs

Data

MSB

LSB

Figure 13. TDM Master Mode Timing Diagram

MSB

SDOUT 4, ch A

32 OSCLKs

MSB

SDOUT 4, ch B

32 OSCLKs

MSB

SDOUT 3, ch A

32 OSCLKs

MSB

SDOUT 3, ch B

32 OSCLKs

MSB

SDOUT 2, ch A

32 OSCLKs

MSB

SDOUT 2, ch B

32 OSCLKs

MSB

SDOUT 1, ch A

32 OSCLKs

MSB

SDOUT 1, ch B

32 OSCLKs

Data

MSB

LSB

Figure 14. TDM Slave Mode Timing Diagram

CS84221

OLRCK

OSCLK

TDM_IN

SDOUT

ILRCK

ISCLK

Slave

SDIN

CS84222

OLRCK

OSCLK

TDM_IN

SDOUT

ILRCK

ISCLK

Slave

SDIN

CS84223

OLRCK

OSCLK

TDM_IN

SDOUT

ILRCK

ISCLK

Slave

SDIN

CS84224

OLRCK

OSCLK

TDM_IN

SDOUT

ILRCK

ISCLK

Slave

SDIN

OLRCK OSCLK SDOUT

PCM Source 1

OLRCK OSCLK SDOUT

OLRCK OSCLK SDOUT

OLRCK OSCLK SDOUT

PCM Source 2

PCM Source 3

PCM Source 4

Figure 15. TDM Mode Configuration (All CS8422 outputs are slave)

DSP

LRCK

SCLK

SDIN

Master

CS84221

OLRCK

OSCLK

TDM_IN

ILRCK

SDOUT

ISCLK

Master

SDIN

CS84222

OLRCK

OSCLK

TDM_IN

ILRCK

SDOUT

ISCLK

SDIN

Slave

CS84223

OLRCK

OSCLK

TDM_IN

ILRCK

SDOUT

ISCLK

SDIN

Slave

CS84224

OLRCK

OSCLK

TDM_IN

ILRCK

SDOUT

ISCLK

SDIN

Slave

DSP

LRCK

SCLK

SDIN

Slave

OLRCK OSCLK SDOUT

OLRCK OSCLK SDOUT

OLRCK OSCLK SDOUT

OLRCK OSCLK SDOUT

PCM Source 1

PCM Source 2

PCM Source 3

PCM Source 4

Figure 16. TDM Mode Configuration (First CS8422 output is master, all others are slave)

28

DS692F1

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