CS8422
SWITCHING CHARACTERISTICS - CONTROL PORT - I²C MODE
Inputs: Logic 0 = 0 V, Logic 1 = VL; CL = 20 pF.
Parameter
Symbol
Min
Max
Unit
SCL Clock Frequency
fscl
-
100
kHz
RST Rising Edge to Start
tirs
500
-
µs
Bus Free Time Between Transmissions
tbuf
4.7
-
µs
Start Condition Hold Time (prior to first clock pulse)
thdst
4.0
-
µs
Clock Low time
tlow
4.7
-
µs
Clock High Time
thigh
4.0
-
µs
Setup Time for Repeated Start Condition
tsust
4.7
-
µs
SDA Hold Time from SCL Falling (Note 17)
thdd
10
-
ns
SDA Setup time to SCL Rising
tsud
250
-
ns
Rise Time of SCL and SDA
trc, trd
-
1000
ns
Fall Time SCL and SDA
tfc, tfd
-
300
ns
Setup Time for Stop Condition
tsusp
4.7
-
µs
Acknowledge Delay from SCL Falling
tack
300
1000
ns
Notes:
17. Data must be held for sufficient time to bridge the transition time, tfc, of SCL.
RST
t irs
Stop
Start
SDA
SCL
t buf
t hdst
t high
t low
t hdd
t sud
t ack
Figure 6. I²C Mode Timing
Repeated
S ta rt t rd
t hdst
Stop
t fd
t fc
t susp
t sust
t rc
DS692F1
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